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公开(公告)号:US07336102B2
公开(公告)日:2008-02-26
申请号:US10710641
申请日:2004-07-27
申请人: Kerry Bernstein , Philip G. Emma , John A. Fifield , Paul D. Kartschoke , William A. Klaasen , Norman J. Rohrer
发明人: Kerry Bernstein , Philip G. Emma , John A. Fifield , Paul D. Kartschoke , William A. Klaasen , Norman J. Rohrer
IPC分类号: H03K19/20 , H03K19/094 , H03K19/003
CPC分类号: H03K19/007
摘要: The invention includes an error correcting logic system that allows critical circuits to be hardened with only one redundant unit and without loss of circuit performance. The system provides an interconnecting gate that suppresses a fault in one of at least two redundant dynamic logic gates that feed to the interconnecting gate. The system is applicable to dynamic or static logic systems. The system prevents propagation of a fault, and addresses not only soft errors, but noise-induced errors.
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公开(公告)号:US06645789B2
公开(公告)日:2003-11-11
申请号:US10246136
申请日:2002-09-18
申请人: Kerry Bernstein , Andres Bryant , Wayne J. Howell , William A. Klaasen , Wilbur D. Pricer , Anthony K. Stamper
发明人: Kerry Bernstein , Andres Bryant , Wayne J. Howell , William A. Klaasen , Wilbur D. Pricer , Anthony K. Stamper
IPC分类号: H01L2100
CPC分类号: H01L27/14683 , G01T1/244 , H01L27/14659 , H01L31/115 , H01L31/118
摘要: An IC chip comprising, a nearby or remote source capable of particle emissions; circuitry formed in the IC chip that is adversely affected by impacts of particle emissions from said source; and a particle detector formed in the IC chip between the circuitry and source for detecting said particle emissions. In one embodiment of the present invention, the source comprises a solder ball that is formed on a surface of the IC chip, and the solder ball is capable of emitting alpha-particles. The particle emissions detector of the present invention is a reverse biased Schottky diode. The IC chip is formed by (a) providing an IC chip having at least one layer of particle sensitive circuitry formed therein; (b) forming another layer having at least one particle sensor region situated therein on a surface of said IC chip; and (c) optionally, forming at least one particle emission source over said another layer.
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公开(公告)号:US06573541B1
公开(公告)日:2003-06-03
申请号:US09670595
申请日:2000-09-29
IPC分类号: H01L27148
CPC分类号: H01L29/76858 , H01L27/14887
摘要: A solid-state CCD device suitable for forming into arrays and for use with suitable hardware to form video image capture devices and methods for fabricating same are provided.
摘要翻译: 提供了适合于形成阵列并与合适的硬件一起使用以形成视频图像捕获装置的固态CCD装置及其制造方法。
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公开(公告)号:US20090002015A1
公开(公告)日:2009-01-01
申请号:US11850857
申请日:2007-09-06
申请人: Kerry Bernstein , Philip G. Emma , John A. Fifield , Paul D. Kartschoke , William A. Klaasen , Norman J. Rohrer
发明人: Kerry Bernstein , Philip G. Emma , John A. Fifield , Paul D. Kartschoke , William A. Klaasen , Norman J. Rohrer
IPC分类号: H03K19/003
CPC分类号: H03K19/007
摘要: The invention includes an error correcting logic system that allows critical circuits to be hardened with only one redundant unit and without loss of circuit performance. The system provides an interconnecting gate that suppresses a fault in one of at least two redundant dynamic logic gates that feed to the interconnecting gate. The system is applicable to dynamic or static logic systems. The system prevents propagation of a fault, and addresses not only soft errors, but noise-induced errors. Also, there is provided a design structure embodied in a machine readable medium used in a design process, and which includes such error correcting logic system.
摘要翻译: 本发明包括纠错逻辑系统,其允许仅使用一个冗余单元来硬化关键电路并且不损失电路性能。 该系统提供互连门,其抑制馈送到互连门的至少两个冗余动态逻辑门之一的故障。 该系统适用于动态或静态逻辑系统。 该系统防止故障传播,不仅解决软错误,而且还会引起噪声引起的错误。 此外,提供了在设计过程中使用的机器可读介质中体现的设计结构,并且包括这种纠错逻辑系统。
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公开(公告)号:US07471115B2
公开(公告)日:2008-12-30
申请号:US11926386
申请日:2007-10-29
申请人: Kerry Bernstein , Philip G. Emma , John A. Fifield , Paul D. Kartschoke , William A. Klaasen , Norman J. Rohrer
发明人: Kerry Bernstein , Philip G. Emma , John A. Fifield , Paul D. Kartschoke , William A. Klaasen , Norman J. Rohrer
IPC分类号: H03K19/096 , H03K19/094
CPC分类号: H03K19/007
摘要: The invention includes an error correcting logic system that allows critical circuits to be hardened with only one redundant unit and without loss of circuit performance. The system provides an interconnecting gate that suppresses a fault in one of at least two redundant dynamic logic gates that feed to the interconnecting gate. The system is applicable to dynamic or static logic systems. The system prevents propagation of a fault, and addresses not only soft errors, but noise-induced errors.
摘要翻译: 本发明包括纠错逻辑系统,其允许仅使用一个冗余单元来硬化关键电路并且不损失电路性能。 该系统提供互连门,其抑制馈送到互连门的至少两个冗余动态逻辑门之一的故障。 该系统适用于动态或静态逻辑系统。 该系统防止故障传播,不仅解决软错误,而且还会引起噪声引起的错误。
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公开(公告)号:US06436814B1
公开(公告)日:2002-08-20
申请号:US09718010
申请日:2000-11-21
IPC分类号: H01L214763
CPC分类号: H01L21/76847 , H01L21/76805 , H01L21/76814 , H01L21/76877 , H01L23/5226 , H01L23/53238 , H01L23/53266 , H01L2924/0002 , H01L2924/00
摘要: An interconnection structure preferably including one or more conductors that have a central region filled with an insulator, and a method of fabricating such an interconnection structure for preferably making an electrical connection to the conductor(s). The method preferably includes the steps of depositing and patterning a first insulator over a substrate to form an aperture opening to the substrate; depositing and polishing a first conductor to leave the first conductor in the aperture; depositing and patterning a second insulator to form an opening through the second insulator and a recess in the aperture; depositing one or more second conductors to line the opening and the recess, and to form a central region of the interconnection structure; depositing a third insulator to at least partially fill the central region; and making an electrical connection to the second conductor(s).
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公开(公告)号:US06344679B1
公开(公告)日:2002-02-05
申请号:US09443524
申请日:1999-11-19
IPC分类号: G11C1706
CPC分类号: H01L23/5258 , G11C17/06 , G11C17/16 , H01L23/5254 , H01L27/0814 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device (102) having a plurality of diodes (100) with alterable electrical conductivity by a source of energy (30), e.g., a laser, external to the semiconductor device. The diodes are formed and energy is applied to alter the electrical conductivity at least 10%, and preferably by several orders of magnitude. Certain embodiments (20, 40 and 50) are formed so as to function as anti-fuses, while another embodiment (60) functions as a fuse. The diodes may be formed as planar diodes (20, 40, 50 and 60) or as lateral diodes (70).
摘要翻译: 一种具有多个二极管(100)的半导体器件(102),所述多个二极管(100)具有通过所述半导体器件外部的能量源(30)例如激光器具有可改变的导电性。 形成二极管并施加能量以改变至少10%的电导率,优选地几个数量级。 某些实施例(20,40和50)被形成为用作抗熔丝,而另一个实施例(60)用作保险丝。 二极管可以形成为平面二极管(20,40,50和60)或形成为侧向二极管(70)。
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公开(公告)号:US5999037A
公开(公告)日:1999-12-07
申请号:US904397
申请日:1997-07-31
CPC分类号: G11C29/785
摘要: A circuit for enabling a controlled transistor in response to an ablated fusible link. The fusible link is configured so that no d.c. potential resides on the link once it has been ablated. A source of alternating voltage is capacitively coupled to the fusible link and maintains the fusible link from reconnection due to dendrite formation once it is ablated. An a.c. to d.c. voltage converter is used to signal the change in condition of the fusible link, thus, actuating a control transistor of a redundant circuit element in a replacement operation.
摘要翻译: 一种用于响应于消融的可熔链路启用受控晶体管的电路。 熔丝链接被配置为没有直流 一旦消融,电位就位于链接上。 交流电压源电容耦合到可熔链路,并且一旦烧蚀就会由于枝晶形成而使可熔连接件重新连接。 一个 到达 电压转换器用于发信号通知熔断条件的变化,从而在更换操作中致动冗余电路元件的控制晶体管。
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公开(公告)号:US07057180B2
公开(公告)日:2006-06-06
申请号:US10604416
申请日:2003-07-18
申请人: John A. Fifield , Paul D. Kartschoke , William A. Klaasen , Stephen V. Kosonocky , Randy W. Mann , Jeffery H. Oppold , Norman J. Rohrer
发明人: John A. Fifield , Paul D. Kartschoke , William A. Klaasen , Stephen V. Kosonocky , Randy W. Mann , Jeffery H. Oppold , Norman J. Rohrer
IPC分类号: G01T1/24
CPC分类号: G11C11/4125
摘要: A detector circuit and method for detecting a silicon well voltage or current to indicate an alpha particle or cosmic ray strike of the silicon well. One significant application for the detection circuit of the present invention is for the redundancy repair latches that are used in SRAMs. The redundancy repair latches are normally written once at power-up to record failed latch data and are not normally written again. If one of the latches changes states due to an SER (Soft Error Rate-such as a strike by an alpha particle or cosmic ray) event, the repair data in the redundancy latches of the SRAM would now be incorrectly mapped. The detector circuit and method monitors the latches for the occurrence of an SER event, and responsive thereto issues a reload of the repair data to the redundancy repair latches. A first embodiment of the detector circuit differentially detects the floating voltages of first and second silicon wells during periods of non-operation of the circuits fabricated in the first and second silicon wells. In a second embodiment, a detector circuit monitors the background voltage level of a single silicon well over first and second consecutive periods of time. A second application for the detection circuit is for traditional logic circuits.
摘要翻译: 一种用于检测硅阱电压或电流以指示硅阱的α粒子或宇宙射线冲击的检测器电路和方法。 本发明的检测电路的一个重要应用是用于SRAM中的冗余修复锁存器。 冗余修复锁存器在上电时通常写入一次,以记录失败的锁存数据,并且通常不会再次写入。 如果其中一个锁存器由于SER(软错误率(例如α粒子或宇宙射线的击穿))事件而改变状态,则SRAM的冗余锁存器中的修复数据现在将被错误地映射。 检测器电路和方法监视锁存器以发生SER事件,并且响应于此,将修复数据重新加载到冗余修复锁存器。 检测器电路的第一实施例在第一和第二硅阱中制造的电路的非操作期间差分地检测第一和第二硅阱的浮置电压。 在第二实施例中,检测器电路在第一和第二连续时间段内监测单个硅阱的背景电压电平。 检测电路的第二个应用是传统的逻辑电路。
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公开(公告)号:US06750530B1
公开(公告)日:2004-06-15
申请号:US10250093
申请日:2003-06-03
IPC分类号: H01L2900
CPC分类号: H01L23/5252 , H01L2924/0002 , H01L2924/00
摘要: A programmable device including: an antifuse; a resistive heating element having a substantially temperature to power response, the resistive heating element adjacent to but not in contact with the antifuse; and means for passing an electric current through the resistive heating element in order to generate heat to raise the temperature of the antifuse sufficiently high enough to decrease a programming voltage of the antifuse, a time the programming voltage is applied to the antifuse or both the programming voltage of the antifuse and the time the programming voltage is applied to the antifuse.
摘要翻译: 一种可编程装置,包括:反熔丝; 电阻加热元件具有基本的温度对功率响应,电阻加热元件邻近但不与反熔丝接触; 以及用于使电流通过电阻加热元件以产生热量以使反熔丝的温度足够高以足以降低反熔丝的编程电压,编程电压施加到反熔丝或编程的时间的装置 反熔丝的电压和编程电压施加到反熔丝的时间。
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