Single-layered end-fire circularly polarized substrate integrated waveguide horn antenna

    公开(公告)号:US10530060B2

    公开(公告)日:2020-01-07

    申请号:US15627158

    申请日:2017-06-19

    申请人: Ke Wu Yifan Yin

    发明人: Ke Wu Yifan Yin

    摘要: An end fire circularly polarized (CP) substrate integrated waveguide (SIW) horn antenna and a method of manufacturing thereof are described. The antenna includes an input section for receiving radio frequency (RF) waves from a source; and a body extending from the input section for receiving the RF waves from the input section, the body comprising a plurality of radiating units, the plurality of radiating units being configured to radiate circularly polarized waves (CP) in a far field, wherein apertures of the plurality of radiating unit being located along an edge of a planar dielectric substrate, and wherein the horn antenna is in a planar form.

    NON-RECIPROCAL MODE CONVERTING SUBSTRATE INTEGRATED WAVEGUIDE

    公开(公告)号:US20180351225A1

    公开(公告)日:2018-12-06

    申请号:US15612450

    申请日:2017-06-02

    IPC分类号: H01P1/397 H01P3/16

    摘要: A non-reciprocal mode converting SIW includes a first straight SIW section, a second straight SIW section, and a curved SIW section coupling the first straight SIW section to the second straight SIW section. The curved SIW section included magnetic biasing at opposed corner regions. The magnetic biasing and a curvature of the curved SIW section causes: (i) a wave in a first transverse electric (TE) mode that propagates in a forward direction from the first straight section through the curved SIW section into the second straight SIW section to convert to a second TE mode, and (ii) a wave in the first TE mode that propagates in a reverse direction from the second straight SIW section through the curved SIW section into the first straight SIW section to maintain the first TE mode.

    Millimeter-wave sourceless receiver

    公开(公告)号:US10116396B1

    公开(公告)日:2018-10-30

    申请号:US15582013

    申请日:2017-04-28

    申请人: Ke Wu Ruizhi Liu

    发明人: Ke Wu Ruizhi Liu

    摘要: A receiver includes a planar antenna array including at least three antennas. Each antenna simultaneous receives a local oscillator (LO) signal from a near field region and a radio frequency (RF) signal from a far field region. Each antenna is coupled to a respective quasi-optical mixer. Each quasi-optical mixer includes only passive components and outputs a respective intermediate frequency (IF) signal. The receiver includes two six-port demodulators. Each six-port demodulator receives a different pair of IF signals as input and outputs signals representing baseband power of the pair of IF signals. Each six-port demodulator includes only passive components. The receiver also includes a processor to calculate direction of arrival (DoA) for the LO signal and the RF signal using the output from the six-port demodulators.

    Waveguide filter
    14.
    发明授权
    Waveguide filter 失效
    波导滤波器

    公开(公告)号:US08130063B2

    公开(公告)日:2012-03-06

    申请号:US12412503

    申请日:2009-03-27

    IPC分类号: H01P1/208

    CPC分类号: H01P1/2088

    摘要: A waveguide bandpass filter for use in microwave and millimeter-wave satellite communications equipment is presented. The filter is based on a substrate integrated waveguide (SIW) having several cascaded oversized SIW cavities. The filter is implemented in a printed circuit board (PCB) or a ceramic substrate using arrays of standard metalized via holes to define the perimeters of the SIW cavities. Transmission lines of a microstrip line, a stripline or coplanar waveguide are used as input and output feeds. The transmission lines have coupling slots for improved stopband performance. The filter can be easily integrated with planar circuits for microwave and millimeter wave applications.

    摘要翻译: 提出了一种用于微波和毫米波卫星通信设备的波导带通滤波器。 滤波器基于具有几个级联的超大SIW腔的衬底集成波导(SIW)。 该滤波器在印刷电路板(PCB)或陶瓷基板中实施,使用标准金属化通孔阵列来限定SIW腔的周长。 使用微带线,带状线或共面波导的传输线作为输入和输出馈送。 传输线具有用于改善阻带性能的耦合槽。 滤波器可以方便地与微波和毫米波应用的平面电路集成。

    4X crystal frequency multiplier with op amp buffer between 2X multiplier stages
    15.
    发明授权
    4X crystal frequency multiplier with op amp buffer between 2X multiplier stages 有权
    4X晶体倍频器,运算放大器在2X倍频级之间

    公开(公告)号:US07053725B1

    公开(公告)日:2006-05-30

    申请号:US10904128

    申请日:2004-10-25

    IPC分类号: H03B5/32

    CPC分类号: H03B19/14

    摘要: A frequency-multiplying circuit generates a multiple of the fundamental frequency of a crystal that oscillates. A first differential multiplier is coupled to the crystal nodes and generates a frequency-doubled output. The frequency-doubled output is applied to an op amp that buffers the output and compares it to a reference to generate a pair of differential buffered signals. The differential buffered signals are applied to a second differential multiplier that generates a final quadrupled-frequency output. The differential multipliers can each have a pair of differential transistors that receive signals that oscillate out-of-phase to each other by 180 degrees. The drains of the differential transistors connect together at a summing node to sum the transistor currents, producing the frequency-doubled output. A crystal driver circuit using cross-coupled and direct-coupled transistors may also be attached to the crystal nodes.

    摘要翻译: 倍频电路产生振荡晶体的基频的倍数。 第一差分乘法器耦合到晶体节点并产生倍频输出。 倍频输出被应用于缓冲输出的运算放大器,并将其与参考值进行比较,以生成一对差分缓冲信号。 差分缓冲信号被施加到产生最终四倍频输出的第二差分乘法器。 差分乘法器可以各自具有一对差分晶体管,其接收彼此相位振荡180度的信号。 差分晶体管的漏极在求和节点处连接在一起,以求晶体管电流,产生倍频输出。 使用交叉耦合和直接耦合晶体管的晶体驱动器电路也可以附接到晶体节点。

    Self-biasing differential buffer with transmission-gate bias generator
    16.
    发明授权
    Self-biasing differential buffer with transmission-gate bias generator 有权
    具有传输门偏置发生器的自偏置差分缓冲器

    公开(公告)号:US06930550B1

    公开(公告)日:2005-08-16

    申请号:US10709267

    申请日:2004-04-26

    申请人: Ke Wu

    发明人: Ke Wu

    摘要: A self-biasing differential buffer generates a self-bias voltage from its inputs. A first amplifier receives a first input signal on gates of four transistors—p and n-channel drive transistors in a drive branch and p and n-channel bias-generating transistors in a bias-generating branch. Current source and current sink transistors source and sink current to both branches. The drains of the drive transistors drive a differential output, while the drains of the bias-generating transistors drive through a transmission gate to a self-bias node. The second amplifier receives the second input signal and has the same structure, with one branch driving the self-bias voltage through another transmission gate, and another branch driving a complementary differential output. The bias-generating branches use smaller transistors so that only a small current is used to generate the self-bias voltage. The self-bias node is fed to the gates of current source and sink transistors.

    摘要翻译: 自偏置差分缓冲器从其输入端产生自偏压。 第一放大器在驱动支路中的四个晶体管-p和n沟道驱动晶体管的栅极上接收第一输入信号,并在偏置产生支路中接收p沟道偏置产生晶体管和n沟道偏置产生晶体管。 电流源和电流吸收晶体管源和灌电流到两个分支。 驱动晶体管的漏极驱动差分输出,而偏置产生晶体管的漏极通过传输门驱动到自偏压节点。 第二放大器接收第二输入信号并且具有相同的结构,其中一个分支通过另一个传输门驱动自偏置电压,另一支路驱动互补差分输出。 偏置产生分支使用较小的晶体管,因此仅使用小电流来产生自偏压。 自偏置节点馈送到电流源和宿晶体管的栅极。

    Low-voltage differential driver with opened eye pattern
    17.
    发明授权
    Low-voltage differential driver with opened eye pattern 有权
    低压差动驱动器,打开眼睛图案

    公开(公告)号:US06590432B1

    公开(公告)日:2003-07-08

    申请号:US10065222

    申请日:2002-09-26

    IPC分类号: H03K300

    摘要: A differential output buffer has a primary stage and a secondary stage that each directly drive differential outputs. Link transistors between the secondary stage and the differential outputs are eliminated. The primary stage continuously receives differential inputs applied to gates of n-channel sourcing and sinking transistors. The sources of the sourcing transistors and the drains of the sinking transistors are connected to the true and complement differential outputs. The secondary stage also has n-channel sourcing and sinking transistors directly connected to the differential outputs. Pulsed inputs applied to secondary-stage gates are normally low, disabling the sourcing and sinking transistors in the secondary stage to disable the secondary stage. However, during a switching transient, the pulsed inputs are pulsed on, allowing the secondary stage to drive a boost current to the differential outputs. This boost current sharpens rise and fall edges to compensate parasitic capacitances, opening the eye pattern.

    摘要翻译: 差分输出缓冲器具有初级级和次级级,每级直接驱动差分输出。 次级级和差分输出之间的链路晶体管被消除。 初级阶段连续接收施加到n沟道源极和吸收晶体管的栅极的差分输入。 源晶体管的源极和漏极晶体管的漏极连接到真和补差分输出。 次级级还具有直接连接到差分输出的n沟道源极和吸收晶体管。 施加到次级栅极的脉冲输入通常较低,禁用次级级的源极和吸收晶体管禁用次级级。 然而,在开关瞬态期间,脉冲输入被脉冲输入,允许次级驱动升压电流到差分输出。 该升压电流锐化上升和下降沿以补偿寄生电容,打开眼图。

    MILLIMETER-WAVE SOURCELESS RECEIVER
    19.
    发明申请

    公开(公告)号:US20180316439A1

    公开(公告)日:2018-11-01

    申请号:US15582013

    申请日:2017-04-28

    申请人: Ke Wu Ruizhi Liu

    发明人: Ke Wu Ruizhi Liu

    摘要: A receiver includes a planar antenna array including at least three antennas. Each antenna simultaneous receives a local oscillator (LO) signal from a near field region and a radio frequency (RF) signal from a far field region. Each antenna is coupled to a respective quasi-optical mixer. Each quasi-optical mixer includes only passive components and outputs a respective intermediate frequency (IF) signal. The receiver includes two six-port demodulators. Each six-port demodulator receives a different pair of IF signals as input and outputs signals representing baseband power of the pair of IF signals. Each six-port demodulator includes only passive components. The receiver also includes a processor to calculate direction of arrival (DoA) for the LO signal and the RF signal using the output from the six-port demodulators.