公开(公告)号：US4951049A

公开(公告)日：1990-08-21

申请号：US327071

申请日：1989-03-22

申请人： Arthur A. Whitfield

发明人： Arthur A. Whitfield

IPC分类号： G11B20/14 ,  H03M5/06 ,  H03M5/12 ,  H04B14/00 ,  H04L7/00

CPC分类号： H03M5/12

摘要： An electrical circuit suitable for encoding binary information, in accordance with a novel modulation method, is provided. The encoder circuit includes: a clock driver; an n-phase counter driven by the clock driver for producing a succession of event-cells, wherein each event-cell is demarcated by a pair of similar, unique clock transitions; first logic circuitry for generating a first transitional event in a first event-cell in response to a first information; and second logic circuitry for generating a second transitional event in a second event-cell in response to a second information, the first transitional event and the second transitional event differing by the number of transitions occurring per event-cell. A specific, preferred encoder circuit embodiment is set forth.

摘要翻译： 提供了适用于根据新颖的调制方法对二进制信息进行编码的电路。 编码器电路包括：时钟驱动器; 由时钟驱动器驱动的用于产生一系列事件单元的n相计数器，其中每个事件单元被一对类似的唯一的时钟转换划分; 第一逻辑电路，用于响应于第一信息在第一事件单元中产生第一过渡事件; 以及用于响应于第二信息在第二事件单元中产生第二过渡事件的第二逻辑电路，所述第一过渡事件和所述第二过渡事件与每事件单元发生的转换次数不同。 阐述了具体的，优选的编码器电路实施例。