公开(公告)号：US20230082004A1

公开(公告)日：2023-03-16

申请号：US17874527

申请日：2022-07-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghyun LEE ,  Junghoon KANG ,  Hyunchul JUNG

IPC: H01L21/56 ,  H01L23/498

Abstract: A method for manufacturing a semiconductor package includes forming a pad pattern including a metal film on a semiconductor chip; forming an insulating layer covering the pad pattern and including an organic insulating material; and forming an opening exposing a surface of the metal film of the pad pattern by performing laser processing on the insulating layer, wherein, in forming the opening, a region to be plastically deformed on the metal film by the laser processing is formed.

公开(公告)号：US20240322674A1

公开(公告)日：2024-09-26

申请号：US18731957

申请日：2024-06-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyomin AHN ,  Youngjae PARK ,  Junghyun LEE ,  Taeho LEE ,  Jehyung CHO

IPC: H02M1/42 ,  H02M1/00 ,  H02M7/06

CPC classification number: H02M1/4291 ,  H02M1/0048 ,  H02M7/06

Abstract: A home appliance for controlling a harmonic magnitude includes a current sensor configured to detect an input current of a power source, and at least one processor, and the at least one processor is configured to obtain a harmonic component from the input current detected by the current sensor, determine a length of a non-conducting interval of a switch so that a magnitude of the obtained harmonic component is less than a predetermined harmonic reference value, and generate a current reference value corresponding to the determined length of the non-conducting interval.

公开(公告)号：US20240211738A1

公开(公告)日：2024-06-27

申请号：US18488497

申请日：2023-10-17

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  Seoul National University R&DB Foundation ,  Daegu Gyeongbuk Institute of Science and Technology ,  Industry Academic Cooperation Foundation, Chosun University

Inventor： Jong-Seon NO ,  Junghyun LEE ,  Yongjune KIM ,  Joon-Woo LEE ,  Young Sik KIM ,  Eunsang LEE

IPC: G06N3/048 ,  G06N3/08

CPC classification number: G06N3/048 ,  G06N3/08

Abstract: An apparatus and method with encrypted data neural network operation is provided. The apparatus includes one or more processors configured to execute instructions and one or more memories storing the instructions, wherein the execution of the instructions by the one or more processors configures the one or more processors to generate a target approximate polynomial, approximating a neural network operation, of a portion of a neural network model, using a determined target approximation region, for the target approximate polynomial, based on a first approximate polynomial generated based on parameters corresponding to a generation of the first approximate polynomial, a maximum value of input data to the portion of the neural network layer, and a minimum value of the input data, and generate a neural network operation result using the target approximate polynomial and the input data.