公开(公告)号：US20130162340A1

公开(公告)日：2013-06-27

申请号：US13727008

申请日：2012-12-26

Applicant: SK Hynix Inc.

Inventor： Jin Yong SEONG

IPC: G05F1/10

CPC classification number: G05F1/10 ,  H01L23/60 ,  H01L24/06 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

Abstract: A multi-chip package includes a single lead and a plurality of inner package chips. Each of the plurality of inner package chips includes at least one pad circuit and an internal circuit. The pad circuit is selectively coupled to the lead and configured to provide a chip address signal corresponding to a connection state to the lead. The inner package chip receives the chip address signal to identify a corresponding inner package chip.

Abstract translation: 多芯片封装包括单个引线和多个内部封装芯片。 多个内包装芯片中的每一个包括至少一个焊盘电路和内部电路。 焊盘电路选择性地耦合到引线并且被配置为向引线提供对应于连接状态的芯片地址信号。 内部封装芯片接收芯片地址信号以识别相应的内部封装芯片。