公开(公告)号：US20180190511A1

公开(公告)日：2018-07-05

申请号：US15685285

申请日：2017-08-24

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Alexandre Mas ,  Benoit Besancon ,  Karine Saxod

IPC: H01L21/56 ,  H01L23/28 ,  H01L23/02

Abstract: A method for manufacturing a cover for an electronic package includes placing an electrically conductive insert (including an electrical contact surface) inside a cavity of a mold in a position such that the electrical contact surface is in contact with a face of the cavity of the mold. A coating material is injected into said cavity and set so as to produce a substrate that is overmolded around the insert and forms the cover where the electrical contact surface of the overmolded substrate is not covered by the coating material. An electronic package is then formed from a chip mounted on a carrier substrate that is covered by the cover. The electrical contact surface is located above and electrically connected to an electrical connection pad of either the chip or the carrier substrate.