公开(公告)号：US10692431B2

公开(公告)日：2020-06-23

申请号：US16214881

申请日：2018-12-10

申请人： SAMSUNG DISPLAY CO, LTD.

发明人： Suhyeong Park

IPC分类号： G09G3/3233 ,  G09G3/3258 ,  G09G3/3291 ,  H01L27/32 ,  G09G3/3266

摘要： A gate driver includes a plurality of stages. A present stage among the plurality of stages is configured to receive a clock signal, a scan signal of a previous stage among the plurality of stages that is before the present stage, a first initialization voltage and a second initialization voltage different from the first initialization voltage and to generate a scan signal of the present stage and a initialization signal of the present stage based on the clock signal, the scan signal of the previous stage, the first initialization voltage and the second initialization voltage. The initialization signal of the present stage is varied between the first initialization voltage and the second initialization voltage according to time.

公开(公告)号：US09847065B2

公开(公告)日：2017-12-19

申请号：US14971476

申请日：2015-12-16

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Heesoon Jeong ,  Suhyeong Park ,  Jimyoung Seo ,  Soo-Wan Yoon

IPC分类号： G09G3/36

CPC分类号： G09G3/3614 ,  G09G3/3648 ,  G09G2300/0434 ,  G09G2310/063

摘要： A display apparatus includes a display panel and a driving circuit. The display panel includes pixels. Each of the pixels is connected to one of gate lines and one of data lines. The driving circuit drives the gate lines and the data lines to display an image on the display panel. The driving circuit alternately provides a first polarity data driving signal and a second polarity data driving signal to each of the plurality of data lines. During an asymmetrical mode, the first polarity data driving signal is provided to first data lines of the data lines during a first frame period before a blank period begins, and the second polarity data driving signal is provided to the first data lines during a second frame period after the blank period ends. The second frame period excludes the blank period.

公开(公告)号：US09847064B2

公开(公告)日：2017-12-19

申请号：US14665896

申请日：2015-03-23

申请人： Samsung Display Co., Ltd.

发明人： Suhyeong Park ,  Nam-Gon Choi ,  Cheolwoo Park

IPC分类号： G09G3/36

CPC分类号： G09G3/3614 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2300/0814 ,  G09G2300/0842 ,  G09G2310/027 ,  G09G2310/0297

摘要： A display apparatus includes a latch circuit configured to generate a second data value from a first data value, wherein the bit count of the second data value is greater than the bit count of the first data value, a digital-analog converter configured to convert the second data value into gray scale voltages, an output buffer unit configured to amplify the current level of the gray scale voltages to generate data voltages, a data switch circuit configured to invert the polarity of the data voltages every frame, and a display panel including a plurality of pixels driven with the data voltages supplied from the data switch circuit in response to sequential application of gate signals.

公开(公告)号：US09721525B2

公开(公告)日：2017-08-01

申请号：US14685344

申请日：2015-04-13

申请人： Samsung Display Co., Ltd.

发明人： Suhyeong Park ,  KyoungWon Lee ,  Hoyong Jung ,  Sangmi Kim ,  Jimyoung Seo ,  Hyundae Lee ,  Heesoon Jeong ,  Cheolwoo Park ,  Bonghyun You

IPC分类号： G06F3/038 ,  G09G3/36

CPC分类号： G09G3/3696 ,  G09G3/3648 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2340/0435

摘要： A display apparatus includes a display panel configured to display an image, a data driver including a voltage generator configured to convert an image data applied thereto to a data voltage and a buffer configured to apply the data voltage to the display panel, a timing controller including a mode controller configured to generate a mode selection signal on the basis of an image frame rate of the image data. The data driver is configured to be operated in a power cut-off mode or a stand-by mode in response to the mode selection signal. The driving voltage switch is configured to cut off the analog driving voltage applied to at least one of the buffer and the voltage generator during the power cut-off mode and the bias controller is configured to reduce a bias current in the stand-by mode.

公开(公告)号：US09542874B2

公开(公告)日：2017-01-10

申请号：US14280529

申请日：2014-05-16

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Suhyeong Park ,  Unggyu Min ,  Young-Soo Yoon ,  Sangik Lee

IPC分类号： G06F3/038 ,  G09G3/20 ,  G09G3/36

CPC分类号： G09G3/20 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/0254 ,  G09G2310/0275 ,  G09G2310/0281 ,  G09G2310/0297 ,  G09G2320/0223 ,  G09G2330/08

摘要： A display apparatus includes: a plurality of pixels coupled to gate lines and to data lines configured to cross the gate lines, a gate driver configured to apply gate signals to the gate lines, a first data driver configured to apply first data voltages to first signal lines, a first DEMUX part configured to selectively couple the first signal lines to the data lines, a second data driver configured to apply second data voltages to second signal lines positioned to correspond to the first signal lines, and a second DEMUX part positioned to face the first DEMUX part such that the pixels are positioned between the first and second DEMUX parts, the second DEMUX part configured to couple the second signal lines to the data lines, which are not coupled to the first signal lines. Each of the first data voltages has a polarity opposite to a polarity of a corresponding second data voltage of the second data voltages.

摘要翻译： 显示装置包括：耦合到栅极线和配置成跨越栅极线的数据线的多个像素，被配置为向栅极线施加栅极信号的栅极驱动器，被配置为将第一数据电压施加到第一信号的第一数据驱动器 线路，被配置为选择性地将第一信号线耦合到数据线的第一DEMUX部分，被配置为将第二数据电压施加到与第一信号线对应的第二信号线的第二数据驱动器，以及定位成面对的第二DEMUX部分 第一DEMUX部分，使得像素位于第一和第二DEMUX部分之间，第二DEMUX部分被配置为将第二信号线耦合到未耦合到第一信号线的数据线。 每个第一数据电压具有与第二数据电压的对应的第二数据电压的极性相反的极性。