Self bias buffer circuit and memory device including the same
    11.
    发明授权
    Self bias buffer circuit and memory device including the same 有权
    自偏置缓冲电路和包含其的存储器件

    公开(公告)号:US09379693B2

    公开(公告)日:2016-06-28

    申请号:US14505614

    申请日:2014-10-03

    CPC classification number: H03K17/04106 G11C5/147 G11C7/1084

    Abstract: A self bias buffer circuit includes a buffer and bias controller. The buffer provides a self bias voltage based on a reference voltage and to be driven based on the self bias voltage. The buffer also generates an output signal based on a comparison of an input signal and the reference voltage. The bias controller adjusts the self bias voltage based on the reference voltage.

    Abstract translation: 自偏置缓冲电路包括缓冲器和偏置控制器。 缓冲器基于参考电压提供自偏压,并且基于自偏压驱动。 缓冲器还基于输入信号和参考电压的比较产生输出信号。 偏置控制器根据参考电压调节自偏置电压。

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