公开(公告)号：US20230067987A1

公开(公告)日：2023-03-02

申请号：US17729131

申请日：2022-04-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyounghee KIM ,  Jinsub Kim ,  Munjun Kim ,  Junkwan Kim

IPC: H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/108

Abstract: A semiconductor device includes: a lower structure including a device and a lower wiring structure; an insulating layer on the lower structure; a via penetrating the insulating layer; a wiring pattern on the insulating layer and the via; and a silicon oxide layer covering the wiring pattern, and including hydrogen, wherein the wiring pattern includes first and second conductive layers, an upper surface protective layer, and a side surface protective layer, wherein the second conductive layer is on the first conductive layer, wherein the upper surface protective layer covers an upper surface of the second conductive layer, and the side surface protective layer covers side surfaces of the first and second conductive layers, and wherein each of the upper surface protective layer and the side surface protective layer includes a metal material having an activation energy higher than that of a metal material of the second conductive layer.

公开(公告)号：US11563017B2

公开(公告)日：2023-01-24

申请号：US17099994

申请日：2020-11-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyoung-Hee Kim ,  Woo Choel Noh ,  Ik Soo Kim ,  Jun Kwan Kim ,  Jinsub Kim ,  Yongjin Shin

IPC: H01L27/11539 ,  H01L27/11519 ,  H01L27/11578 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11551

Abstract: A semiconductor device including a substrate that includes a cell array region and a peripheral circuit region; a cell transistor on the cell array region of the substrate; a peripheral transistor on the peripheral circuit region of the substrate; a first interconnection layer connected to the cell transistor; a second interconnection layer connected to the peripheral transistor; an interlayer dielectric layer covering the first interconnection layer; and a blocking layer spaced apart from the first interconnection layer, the blocking layer covering a top surface and a sidewall of the second interconnection layer.