公开(公告)号：US07519932B2

公开(公告)日：2009-04-14

申请号：US11393074

申请日：2006-03-30

申请人： Toshiyuki Sakamoto

发明人： Toshiyuki Sakamoto

IPC分类号： G06F9/45 ,  G06F17/50

CPC分类号： G06F17/5031

摘要： A system for analyzing crosstalk occurring in a semiconductor integrated circuit, includes calculating timing windows of first and second wires under a first and second analysis conditions, a sequence determination module determining whether a sequence of the timing windows of the first and second wires interchanges, and an analysis module analyzes crosstalk occurring between the first and second wires when an interchange of the sequence occurs.

摘要翻译： 一种用于分析在半导体集成电路中发生的串扰的系统，包括在第一和第二分析条件下计算第一和第二布线的定时窗口，序列确定模块，确定第一和第二布线的定时窗口序列是否互换;以及 当发生序列的交换时，分析模块分析在第一和第二线之间发生的串扰。

公开(公告)号：US20060230374A1

公开(公告)日：2006-10-12

申请号：US11393074

申请日：2006-03-30

申请人： Toshiyuki Sakamoto

发明人： Toshiyuki Sakamoto

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A system for analyzing crosstalk occurring in a semiconductor integrated circuit, includes calculating timing windows of first and second wires under a first and second analysis conditions, a sequence determination module determining whether a sequence of the timing windows of the first and second wires interchanges, and an analysis module analyzes crosstalk occurring between the first and second wires when an interchange of the sequence occurs.