摘要:
A method of forming a silicon layer includes the step of calibrating the heater temperature so that a predetermined temperature is maintained when a microelectronic substrate is subsequently heated despite a number of processing runs previously performed. This calibrating step includes loading a test substrate into the reaction chamber, subjecting the test substrate to the predetermined reaction recipe wherein the test substrate is heated according to the predetermined recipe, measuring the temperature of the substrate, and removing the test substrate from the reaction chamber. The heater temperature is then adjusted according to the measured temperature of the test substrate. A microelectronic substrate is then loaded into the reaction chamber, and a hemispherical grained silicon seed layer is formed on the microelectronic substrate according to the predetermined recipe. The hemispherical grained silicon seed layer is annealed to form a hemispherical grained silicon layer according to the predetermined recipe.
摘要:
A capacitor of a highly integrated semiconductor device and a manufacturing method thereof is provided. In the highly integrated semiconductor device, an HSG polysilicon layer pattern is formed having a multitude of hemispherical grains (HSG) on the top and side surfaces of the storage electrode. Thus, the etching of and damage to the HSG polysilicon layer pattern can be prevented, and capacitance can be increased by maximizing the surface area of the storage electrode.
摘要:
Methods of forming Ta2O5 layers in a process chamber are disclosed. A Ta2O5 layer can be maintained at a first temperature that is less than a temperature for crystallization of the Ta2O5 layer. At least one of a position of the Ta2O5 layer in the process chamber relative to the heater and a pressure in the process chamber is changed to increase the temperature of the Ta2O5 layer to about the temperature for crystallization.
摘要翻译:公开了在处理室中形成Ta 2 O 5层的方法。 可以将Ta 2 O 5层保持在小于Ta 2 O 5层的结晶温度的第一温度。 改变处理室中的Ta 2 O 5层相对于加热器的位置和处理室中的压力中的至少一个,以使Ta 2 O 5层的温度升高至约结晶温度。
摘要:
A semiconductor device adopting an interlayer contact structure between upper and lower conductive layers and a method of manufacturing the semiconductor device adopting the structure are provided. The lower conductive layer includes a first conductive layer and a first silicide layer stacked together. The upper conductive layer includes a second conductive layer doped with impurities and a second silicide layer stacked together. In the interlayer contact structure, the first and second conductive layers are in direct contact with each other. This decreases the contact resistance between the two conductive layers and improves the electrical properties of the device.
摘要:
A layer is formed by chemical vapor depositing a seeding layer of ruthenium oxide on a substrate at a chemical vapor deposition flow rate ratio of a ruthenium source to oxygen gas. A main layer of ruthenium is chemical vapor deposited on the seeding layer by increasing the chemical vapor deposition flow rate ratio of the ruthenium source to the oxygen gas.
摘要:
A method for forming an electrode structure includes the steps of forming a conductive electrode on the microelectronic substrate, forming HSG-silicon seeds on the surface of the conductive electrode, and etching the conductive electrode using the HSG-silicon seeds as a mask so that pits are formed between the HSG-silicon seeds. In addition, the HSG-silicon seeds on the conductive electrode can be grown to form enlarged HSG-silicon bumps on the conductive electrode further increasing the surface area thereof. Related structures are also discussed.
摘要:
A method of forming a capacitor structure includes the steps of forming a conductive layer on a microelectronic substrate, and forming a first hemispherical grained silicon layer on the conductive layer opposite the substrate. A protective layer is formed on the hemispherical grained silicon layer. The protective layer, the first hemispherical grained silicon layer, and the conductive layer are then patterned so that portions of the microelectronic substrate are exposed adjacent the patterned conductive layer. A second hemispherical grained silicon layer is formed on the surface of the protective layer opposite the first hemispherical grained silicon layer, on sidewalls of the patterned conductive layer, and on the exposed portions of the microelectronic substrate. Portions of the second hemispherical grained silicon layer are removed from the exposed portions of the microelectronic substrate, and the patterned protective layer is then removed.
摘要:
A method for forming a film includes forming the film on a substrate, followed by performing a first annealing of the film at a temperature lower than a crystallization temperature of the film. A second annealing of the film is performed at a temperature higher that the crystallization temperature. Forming the film and the first annealing of the film are performed in situ in a chamber. Alternatively, the first and second annealing are performed in situ in an apparatus.
摘要:
Methods of forming Ta2O5 layers in a process chamber are disclosed. A Ta2O5 layer can be maintained at a first temperature that is less than a temperature for crystallization of the Ta2O5 layer. At least one of a position of the Ta2O5 layer in the process chamber relative to the heater and a pressure in the process chamber is changed to increase the temperature of the Ta2O5 layer to about the temperature for crystallization.
摘要:
A capacitor fabricating method for a semiconductor device where a dielectric film is thermally treated under hydrogen atmosphere to improve interface characteristics between the dielectric film and an electrode. In the method, a lower electrode is formed on a semiconductor substrate. A dielectric film is formed on the lower electrode. The dielectric film is thermally treated under hydrogen atmosphere. An upper electrode is formed on the dielectric film, thereby completing formation of the capacitor. The thermal treatment under the hydrogen atmosphere is performed at a temperature of 300 to 600.degree. C. using H.sub.2 gas or H.sub.2 plasma for 5 to 60 minutes. Thus, the density of an interface trap between the electrode and the dielectric film of the capacitor is reduced.