公开(公告)号：US09997069B2

公开(公告)日：2018-06-12

申请号：US13802654

申请日：2013-03-13

申请人： APPLE INC.

发明人： Jonathan A. Bennett ,  Stephen O. Lemay ,  Marcel van Os ,  Scott Forstall ,  Bradford A. Moore ,  Emanuele Vulcano ,  Seejo K. Pylappan

IPC分类号： G08G1/0968 ,  G01C21/36 ,  H04R5/04 ,  G01C21/34 ,  G08G1/0962 ,  G08G1/0967 ,  G10L15/22

CPC分类号： G08G1/096855 ,  G01C21/34 ,  G01C21/3608 ,  G01C21/3611 ,  G01C21/3614 ,  G01C21/3617 ,  G01C21/3626 ,  G01C21/3629 ,  G01C21/3632 ,  G01C21/3638 ,  G01C21/3664 ,  G08G1/0962 ,  G08G1/096716 ,  G08G1/096758 ,  G08G1/096775 ,  G10L15/222 ,  H04R5/04 ,  H04R2499/11 ,  H04R2499/13 ,  H04R2499/15 ,  Y02B70/10 ,  Y02D70/10

摘要： A context-aware voice guidance method is provided that interacts with other voice services of a user device. The voice guidance does not provide audible guidance while the user is making a verbal request to any of the voice-activated services. Instead, the voice guidance transcribes its output on the screen while the verbal requests from the user are received. In some embodiments, the voice guidance only provides a short warning sound to get the user's attention while the user is speaking on a phone call or another voice-activated service is providing audible response to the user's inquires. The voice guidance in some embodiments distinguishes between music that can be ducked and spoken words, for example from an audiobook, that the user wants to pause instead of being skipped. The voice guidance ducks music but pauses spoken words of an audio book in order to provide voice guidance to the user.

公开(公告)号：US09910483B2

公开(公告)日：2018-03-06

申请号：US14154517

申请日：2014-01-14

申请人： Intel Corporation

发明人： Herbert Hum ,  Eric Sprangle ,  Doug Carmean ,  Rajesh Kumar

IPC分类号： G06F9/30 ,  G06F1/32 ,  G06T1/20 ,  G06F9/50 ,  G06F13/24 ,  G06F9/38 ,  G06F9/46 ,  G06F1/20 ,  G06F12/0875

CPC分类号： G06F1/3293 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  G06F9/3869 ,  G06F9/461 ,  G06F9/5088 ,  G06F9/5094 ,  G06F12/0875 ,  G06F13/24 ,  G06F2209/5017 ,  G06F2212/452 ,  G06T1/20 ,  Y02B70/10 ,  Y02B70/1425 ,  Y02B70/30 ,  Y02B70/32 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D50/20

摘要： Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.

公开(公告)号：US09874926B2

公开(公告)日：2018-01-23

申请号：US14498319

申请日：2014-09-26

申请人： Intel Corporation

发明人： Herbert Hum ,  Eric Sprangle ,  Douglas Carmean ,  Rajesh Kumar

IPC分类号： G06F1/32 ,  G06T1/20 ,  G06F9/50 ,  G06F13/24 ,  G06F9/38 ,  G06F9/46 ,  G06F1/20 ,  G06F12/0875

CPC分类号： G06F1/3293 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  G06F9/3869 ,  G06F9/461 ,  G06F9/5088 ,  G06F9/5094 ,  G06F12/0875 ,  G06F13/24 ,  G06F2209/5017 ,  G06F2212/452 ,  G06T1/20 ,  Y02B70/10 ,  Y02B70/1425 ,  Y02B70/30 ,  Y02B70/32 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D50/20

摘要： Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.

公开(公告)号：US09660549B2

公开(公告)日：2017-05-23

申请号：US14743383

申请日：2015-06-18

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Kyung-hwan So

IPC分类号： H02J3/14 ,  H02M7/217 ,  H02M3/335 ,  H02M1/00

CPC分类号： H02M7/217 ,  H02M3/33507 ,  H02M2001/0032 ,  Y02B70/10 ,  Y02B70/16 ,  Y10T307/406

摘要： A switching mode power supply (SMPS) includes a rectifier to rectify an alternating current (AC) voltage; a first transformer to convert the rectified voltage into a first output voltage of the SMPS according to a switching operation of a first switching unit; a second transformer to convert the rectified voltage into a second output voltage of the SMPS according to a switching operation of a second switching unit; first and second switching control units to control the switching operations of the first and second switching units; a power blocking unit to block power supply according to a light signal. The power blocking unit is electrically insulated from the light emitting unit.

公开(公告)号：US20160370851A1

公开(公告)日：2016-12-22

申请号：US15256101

申请日：2016-09-02

申请人： HERBERT HUM ,  ERIC SPRANGLE ,  DOUG CARMEAN ,  RAJESH KUMAR

发明人： HERBERT HUM ,  ERIC SPRANGLE ,  DOUG CARMEAN ,  RAJESH KUMAR

IPC分类号： G06F1/32 ,  G06F1/20 ,  G06F12/0875

CPC分类号： G06F1/3293 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  G06F9/3869 ,  G06F9/461 ,  G06F9/5088 ,  G06F9/5094 ,  G06F12/0875 ,  G06F13/24 ,  G06F2209/5017 ,  G06F2212/452 ,  G06T1/20 ,  Y02B70/10 ,  Y02B70/1425 ,  Y02B70/30 ,  Y02B70/32 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D50/20

摘要： Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.

摘要翻译： 控制多个不对称核心之间的功率和处理的技术。 在一个实施例中，根据系统的性能和功率需求，一个或多个非对称核被功率管理以在多个核之间迁移进程或线程。

公开(公告)号：US20150012765A1

公开(公告)日：2015-01-08

申请号：US14498135

申请日：2014-09-26

申请人： Herbert HUM ,  Eric SPRANGLE ,  Douglas CARMEAN ,  Rajesh KUMAR

发明人： Herbert HUM ,  Eric SPRANGLE ,  Douglas CARMEAN ,  Rajesh KUMAR

IPC分类号： G06F1/32 ,  G06F9/50

CPC分类号： G06F1/3293 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  G06F9/3869 ,  G06F9/461 ,  G06F9/5088 ,  G06F9/5094 ,  G06F12/0875 ,  G06F13/24 ,  G06F2209/5017 ,  G06F2212/452 ,  G06T1/20 ,  Y02B70/10 ,  Y02B70/1425 ,  Y02B70/30 ,  Y02B70/32 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D50/20

摘要： Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.

摘要翻译： 控制多个不对称核心之间的功率和处理的技术。 在一个实施例中，根据系统的性能和功率需求，一个或多个非对称核被功率管理以在多个核之间迁移进程或线程。

公开(公告)号：US08930722B2

公开(公告)日：2015-01-06

申请号：US12380210

申请日：2009-02-25

申请人： Eric Sprangle ,  Doug Carmean ,  Rajesh Kumar

发明人： Eric Sprangle ,  Doug Carmean ,  Rajesh Kumar

IPC分类号： G06F1/00 ,  G06F1/26 ,  G06F1/32 ,  G06F9/50 ,  G06T1/20 ,  G06F13/24

CPC分类号： G06F1/3293 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  G06F9/3869 ,  G06F9/461 ,  G06F9/5088 ,  G06F9/5094 ,  G06F12/0875 ,  G06F13/24 ,  G06F2209/5017 ,  G06F2212/452 ,  G06T1/20 ,  Y02B70/10 ,  Y02B70/1425 ,  Y02B70/30 ,  Y02B70/32 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D50/20

摘要： Techniques to control power and processing among a plurality of asymmetric processing elements are disclosed. In one embodiment, one or more asymmetric processing elements are power managed to migrate processes or threads among a plurality of processing elements according to the performance and power needs of the system.

摘要翻译： 公开了在多个不对称处理元件之间控制功率和处理的技术。 在一个实施例中，一个或多个非对称处理元件被功率管理以根据系统的性能和功率需求在多个处理元件之间迁移进程或线程。

公开(公告)号：US08615647B2

公开(公告)日：2013-12-24

申请号：US12220092

申请日：2008-07-22

申请人： Herbert Hum ,  Eric Sprangle ,  Doug Carmean ,  Rajesh Kumar

发明人： Herbert Hum ,  Eric Sprangle ,  Doug Carmean ,  Rajesh Kumar

IPC分类号： G06F1/32

CPC分类号： G06F1/3293 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  G06F9/3869 ,  G06F9/461 ,  G06F9/5088 ,  G06F9/5094 ,  G06F12/0875 ,  G06F13/24 ,  G06F2209/5017 ,  G06F2212/452 ,  G06T1/20 ,  Y02B70/10 ,  Y02B70/1425 ,  Y02B70/30 ,  Y02B70/32 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D50/20

摘要： Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.

摘要翻译： 控制多个不对称核心之间的功率和处理的技术。 在一个实施例中，根据系统的性能和功率需求，一个或多个非对称核被功率管理以在多个核之间迁移进程或线程。

公开(公告)号：US20110298281A1

公开(公告)日：2011-12-08

申请号：US13152912

申请日：2011-06-03

申请人： Kyung-hwan SO

发明人： Kyung-hwan SO

IPC分类号： H02M3/335

CPC分类号： H02M7/217 ,  H02M3/33507 ,  H02M2001/0032 ,  Y02B70/10 ,  Y02B70/16 ,  Y10T307/406

摘要： A switching mode power supply (SMPS) and a power supply method using the SMPS, the SMPS including: a rectifier to rectify an alternating current (AC) voltage; a first switching unit to switch the voltage rectified by the rectifier; a first switching control unit to control the first switching unit; and a power blocking unit to block power supply to the first switching control unit in a power saving mode.

摘要翻译： 开关模式电源（SMPS）和使用SMPS的电源方法，SMPS包括：整流器对整流电压（AC）进行整流; 第一开关单元，用于切换由整流器整流的电压; 第一开关控制单元，用于控制第一开关单元; 以及功率阻断单元，其以省电模式来阻止向所述第一开关控制单元的电力供应。

公开(公告)号：US09829965B2

公开(公告)日：2017-11-28

申请号：US14498014

申请日：2014-09-26

申请人： INTEL CORPORATION

发明人： Herbert Hum ,  Eric Sprangle ,  Douglas Carmean ,  Rajesh Kumar

IPC分类号： G06F1/24 ,  G06F9/00 ,  G06F1/32 ,  G06T1/20 ,  G06F9/50 ,  G06F13/24 ,  G06F9/38 ,  G06F9/46 ,  G06F1/20 ,  G06F12/0875

CPC分类号： G06F1/3293 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  G06F9/3869 ,  G06F9/461 ,  G06F9/5088 ,  G06F9/5094 ,  G06F12/0875 ,  G06F13/24 ,  G06F2209/5017 ,  G06F2212/452 ,  G06T1/20 ,  Y02B70/10 ,  Y02B70/1425 ,  Y02B70/30 ,  Y02B70/32 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D50/20

摘要： Techniques are disclosed to control power and processing among a plurality of asymmetric cores. In one embodiment, a multi-core processor includes first and second processing cores, each including an arithmetic logic unit and an instruction decoder, wherein the first processing core is capable of operating at a higher processing throughput than the second processing core, wherein the first and second processing cores have different instruction sets, wherein, in response to an occurrence of an event, a task processed on the first processing core is to be translated and transferred to the second processing core after saving a core state of the first processing core and providing the core state to the second processing core, wherein instructions to run on the second processing core are translated to the instruction set of the second processing core by a software binary translation shell, and wherein the first and second processing cores are to concurrently execute instructions according to their own instruction sets.