摘要:
The present invention provides a method for producing a controlled output voltage for a switching power converter under current control using pulse width modulation, the switching power converter including a predictive digital current-mode controller and a digital pulse width modulator. The current control results in an unstable output voltage, and the pulse width modulation method is selected to eliminate the instability of the output voltage.
摘要:
What is described is a battery management architecture that eliminates previously described problems of the previous solutions and compensates for the extra cost of a cell-balancing circuit. These advantages are achieved by integrating the voltage step-up and balancing functions as well as charging functions inside a single converter topology. Instead of providing the entire output voltage and power, the converter in this configuration is merely assisting the battery by providing a portion of the power delivered to the load, rather than the entirety of the power delivered to the load. This portion of power is proportional to the difference between the output and the battery pack voltages.
摘要:
The present invention is a voltage mode digital controller for low-power high-frequency dc-dc converters that has recovery time approaching physical limitations of a given power stage. It consists of a digital controller with load transient response approaching physical limitations of a given power stage that is suitable for low-power SMPS. In one aspect the invention is a method of utilizing a continuous-time digital signal processor (CT-DSP) for regulation of the operation of switch-mode power supplies. A CT-DSP can be used to instantaneously detect changes of voltage or current during transition periods and immediately perform control action that results in the fastest possible response. The invention may include current program mode controllers for SMPS where the input current is sensed as well as power factor correction rectifiers (PFC), where often input voltage, input current and output voltage are sensed. Upon sensing a deviation in the input voltage the CT-DSP is utilized to apply a switch-mode power operation whereby the controller switches between continuous-time and digital function.
摘要:
Exemplary embodiments are directed to a power controller. A method may include comparing a summation voltage comprising a sum of an amplified error voltage and a reference voltage with an estimated voltage to generate a comparator output signal. The method may also include generating a gate drive signal from the comparator output signal and filtering a signal coupled to a power stage to generate the estimated voltage.
摘要:
A method for improving heavy-to-light load transient response in low-power switch-mode power supplies is described. It uses a negative voltage input power rail and a digital controller with an extended duty ratio control value to provide faster discharging current slew rate in the switched mode power supplies (SMPS) inductor.
摘要:
A switched mode power can use a digital controller to control the switching of the at least one switch of the switched mode power supply. The current through the power inductor can be estimated using a self-tuning digital current estimator.
摘要:
A multiphase hybrid digital pulse width modulator can comprise a counter that is selectable between at least two different numbers of states to indicate a first portion of a switching period. Unclocked logic can indicate a second portion of the switching period. The unclocked logic can include a delay line.
摘要:
One embodiment of the present invention is a digitally controlled DC-DC converter comprising of a power stage including at least one switch and an output capacitor. A digital controller can control the switching of the at least one switch. The digital controller can include logic to produce an indication related to a zero resulting from the equivalent series resistance (ESR) of the output capacitor and to update the control of the switching of the switch in the power stage based on the estimate.
摘要:
A voltage-to-time based windowed analog-to-digital converter (ADC) can have programmable reference voltage, conversion time, and accuracy of voltage regulation. The ADC can be fully implemented on a small silicon area and is suitable for implementation in various integrated digital controllers for high-frequency low-power switch-mode power supplies (SMPS). The programmable characteristics can be achieved through the utilization of the inherent averaging effect of the delay line or of the other voltage-to-time conversion structures and through the adjustments of delay cells' propagation times or the effective voltage-to-time conversion ratio in alternative structures.
摘要:
A limit-cycle oscillation (LCO) based switch-mode power supply (SMPS) response evaluation provides an effective mechanism for determining the characteristic response of an SMPS during normal operation of the SMPS. LCOs are induced in the SMPS loop by introducing a non-linearity in the loop, for example, decreasing the resolution of a pulse-width modulator that controls the SMPS switching circuit. The frequency and amplitude of the LCOs are determined and used to evaluate the characteristic response of the SMPS. In order to produce symmetric LCOs, which are more easily modeled, a zero-offset calibration circuit adjusts values provided to the pulse-width modulator, so that each value introduced during calibration is at the midpoint of a resolution cell. The frequency can be measured by counting between zero-crossings of the LCOs and the amplitude measured by capturing the LCO values immediately prior to each zero-crossing of a first difference of the LCO samples.