公开(公告)号：US20050263248A1

公开(公告)日：2005-12-01

申请号：US11131010

申请日：2005-05-16

申请人： Juan Rocha-Alvarez ,  Ganesh Balasubramanian ,  Tom Cho ,  Deenesh Padhi ,  Thomas Nowak ,  Bok Kim ,  Hichem M'Saad ,  Daemian Raj

发明人： Juan Rocha-Alvarez ,  Ganesh Balasubramanian ,  Tom Cho ,  Deenesh Padhi ,  Thomas Nowak ,  Bok Kim ,  Hichem M'Saad ,  Daemian Raj

IPC分类号： C23C16/44 ,  C23C16/455 ,  C23F1/00 ,  H01J37/32

CPC分类号： C23C16/45574 ,  C23C16/4405 ,  C23C16/45565 ,  H01J37/3244 ,  H01J37/32449

摘要： Apparatus and methods for distributing gases into a processing chamber are disclosed. In one embodiment, the apparatus includes a gas distribution plate having a plurality of apertures disposed therethrough and a blocker plate having both a plurality of apertures disposed therethrough and a plurality of feed through passageways disposed therein. A first gas pathway delivers a first gas through the plurality of apertures in the blocker plate and the gas distribution plate. A bypass gas pathway delivers a second gas through the plurality of feed through passageways in the blocker plate and to areas around the blocker plate prior to the second gas passing through the gas distribution plate.

摘要翻译： 公开了将气体分配到处理室中的装置和方法。 在一个实施例中，该装置包括一个气体分配板，该气体分配板具有穿过其中的多个孔，以及一个阻挡板，其具有设置在其间的多个孔和设置在其中的多个进给通道。 第一气体通道通过阻挡板和气体分配板中的多个孔传送第一气体。 旁路气体通道在第二气体通过气体分配板之前，通过多个进料通过阻挡板中的通道和阻塞板周围的区域输送第二气体。

公开(公告)号：US06905622B2

公开(公告)日：2005-06-14

申请号：US10117712

申请日：2002-04-03

申请人： Deenesh Padhi ,  Joseph Yahalom ,  Sivakami Ramanathan ,  Chris R. McGuirk ,  Srinivas Gandikota ,  Girish Dixit

发明人： Deenesh Padhi ,  Joseph Yahalom ,  Sivakami Ramanathan ,  Chris R. McGuirk ,  Srinivas Gandikota ,  Girish Dixit

IPC分类号： C23C18/16 ,  H01L21/02 ,  H01L21/285 ,  H01L21/288 ,  H01L21/306 ,  H01L21/321 ,  H01L21/768 ,  B44C1/22 ,  B05D3/04 ,  B05D3/10

CPC分类号： H01L21/02074 ,  C23C18/1694 ,  C23C18/1831 ,  C23C18/1834 ,  C23C18/1851 ,  C23C18/1879 ,  C23C18/1882 ,  C23C18/1893 ,  C23C18/31 ,  C23C18/34 ,  C23C18/36 ,  C23C18/50 ,  H01L21/02068 ,  H01L21/28518 ,  H01L21/288 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76874 ,  H01L2221/1089

摘要： Methods and apparatus are provided for forming a metal or metal silicide layer by an electroless deposition technique. In one aspect, a method is provided for processing a substrate including depositing an initiation layer on a substrate surface, cleaning the substrate surface, and depositing a conductive material on the initiation layer by exposing the initiation layer to an electroless solution. The method may further comprise etching the substrate surface with an acidic solution and cleaning the substrate of the acidic solution prior to depositing the initiation layer. The initiation layer may be formed by exposing the substrate surface to a noble metal electroless solution or a borane-containing solution. The conductive material may be deposited with a borane-containing reducing agent. The conductive material may be used as a passivation layer, a barrier layer, a seed layer, or for use in forming a metal silicide layer.

公开(公告)号：US06899816B2

公开(公告)日：2005-05-31

申请号：US10117711

申请日：2002-04-03

申请人： Deenesh Padhi ,  Joseph Yahalom ,  Sivakami Ramanathan ,  Chris R. McGuirk ,  Srinivas Gandikota ,  Girish Dixit

发明人： Deenesh Padhi ,  Joseph Yahalom ,  Sivakami Ramanathan ,  Chris R. McGuirk ,  Srinivas Gandikota ,  Girish Dixit

IPC分类号： C23C18/18 ,  H01L21/285 ,  H01L21/288 ,  H01L21/336 ,  H01L21/768 ,  B44C1/22 ,  B05D3/04 ,  B05D3/10

CPC分类号： H01L21/76843 ,  C23C18/1651 ,  C23C18/1893 ,  H01L21/28518 ,  H01L21/288 ,  H01L21/76849 ,  H01L21/76874 ,  H01L29/665 ,  H01L2221/1089

摘要： Methods and apparatus are provided for forming a metal or metal silicide layer by an electroless deposition technique. In one aspect, a method is provided for processing a substrate including depositing an initiation layer on a substrate surface, cleaning the substrate surface, and depositing a conductive material on the initiation layer by exposing the initiation layer to an electroless solution. The method may further comprise etching the substrate surface with an acidic solution and cleaning the substrate of the acidic solution prior to depositing the initiation layer. The initiation layer may be formed by exposing the substrate surface to a noble metal electroless solution or a borane-containing solution. The conductive material may be deposited with a borane-containing reducing agent. The conductive material may be used as a passivation layer, a barrier layer, a seed layer, or for use in forming a metal silicide layer.

摘要翻译： 提供了通过无电沉积技术形成金属或金属硅化物层的方法和装置。 在一个方面，提供了一种用于处理衬底的方法，包括在衬底表面上沉积起始层，清洁衬底表面，以及通过将引发层暴露于无电镀溶液而在引发层上沉积导电材料。 该方法可以进一步包括用酸性溶液蚀刻衬底表面并在沉积起始层之前清洁酸性溶液的衬底。 起始层可以通过将基材表面暴露于贵金属化学电解溶液或含硼烷溶液来形成。 导电材料可以用含硼烷的还原剂沉积。 导电材料可以用作钝化层，阻挡层，种子层，或用于形成金属硅化物层。

公开(公告)号：US10227695B2

公开(公告)日：2019-03-12

申请号：US12974365

申请日：2010-12-21

申请人： Dale R. Du Bois ,  Mohamad A. Ayoub ,  Robert Kim ,  Amit Bansal ,  Mark Fodor ,  Binh Nguyen ,  Siu F. Cheng ,  Hang Yu ,  Chiu Chan ,  Ganesh Balasubramanian ,  Deenesh Padhi ,  Juan Carlos Rocha

发明人： Dale R. Du Bois ,  Mohamad A. Ayoub ,  Robert Kim ,  Amit Bansal ,  Mark Fodor ,  Binh Nguyen ,  Siu F. Cheng ,  Hang Yu ,  Chiu Chan ,  Ganesh Balasubramanian ,  Deenesh Padhi ,  Juan Carlos Rocha

IPC分类号： C23C14/04 ,  C23C16/04 ,  C23C16/44 ,  C23C16/455 ,  C23C16/458 ,  C30B25/12 ,  H01J37/32 ,  H01J37/34 ,  H01L21/687

摘要： Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.

公开(公告)号：US20130189845A1

公开(公告)日：2013-07-25

申请号：US13354129

申请日：2012-01-19

申请人： Sungjin Kim ,  Deenesh Padhi ,  Song Hyun Hong ,  Bok Hoen Kim ,  Derek R. Witty

发明人： Sungjin Kim ,  Deenesh Padhi ,  Song Hyun Hong ,  Bok Hoen Kim ,  Derek R. Witty

IPC分类号： H01L21/311

CPC分类号： H01L21/0337 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/0332 ,  H01L21/0338 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/32139

摘要： A method of forming a nitrogen-doped amorphous carbon layer on a substrate in a processing chamber is provided. The method generally includes depositing a predetermined thickness of a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, depositing conformally a predetermined thickness of a nitrogen-doped amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the nitrogen-doped amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the nitrogen-doped amorphous carbon layer, and removing the patterned features from the substrate.

公开(公告)号：US08278139B2

公开(公告)日：2012-10-02

申请号：US12566948

申请日：2009-09-25

申请人： Siu F. Cheng ,  Deenesh Padhi

发明人： Siu F. Cheng ,  Deenesh Padhi

IPC分类号： H01L21/02

CPC分类号： H01L45/04 ,  H01L28/20 ,  H01L45/145

摘要： A method and apparatus is provided for forming a resistive memory device having good adhesion among the components thereof. A first conductive layer is formed on a substrate, and the surface of the first conductive layer is treated to add adhesion promoting materials to the surface. The adhesion promoting materials may form a layer on the surface, or they may incorporate into the surface or merely passivate the surface of the first conductive layer. A variable resistance layer is formed on the treated surface, and a second conductive layer is formed on the variable resistance layer. Adhesion promoting materials may also be included at the interface between the variable resistance layer and the second conductive layer.

摘要翻译： 提供了一种用于形成其组件之间具有良好粘附性的电阻式存储器件的方法和装置。 在基板上形成第一导电层，并处理第一导电层的表面以向表面添加增粘材料。 粘合促进材料可以在表面上形成一层，或者它们可以结合到表面中或仅仅钝化第一导电层的表面。 在经处理​​的表面上形成可变电阻层，在可变电阻层上形成第二导电层。 粘合促进材料也可以包括在可变电阻层和第二导电层之间的界面处。

公开(公告)号：US20120129351A1

公开(公告)日：2012-05-24

申请号：US12952024

申请日：2010-11-22

申请人： Anthony Konecni ,  Josephine Juhwei Liu ,  Deenesh Padhi ,  Bok Hoen Kim ,  William H. Mc Clintock

发明人： Anthony Konecni ,  Josephine Juhwei Liu ,  Deenesh Padhi ,  Bok Hoen Kim ,  William H. Mc Clintock

IPC分类号： H01L21/467 ,  H01L21/461

CPC分类号： H01L21/31144 ,  H01L21/02115 ,  H01L21/02274

摘要： A method and apparatus for forming an amorphous carbon layer on a substrate is provided. A first portion of the amorphous carbon layer having a high stress level is formed from a hydrocarbon precursor having high dilution ratio, with optional amine precursor included to add stress-elevating nitrogen. A second portion of the amorphous carbon layer having a low stress level is formed on the first portion by reducing the dilution ratio of the hydrocarbon precursor and lowering or eliminating the amine gas. Pressure, temperature, and RF power input may be adjusted instead of, or in addition to, precursor flow rates, and different precursors may be used for different stress levels.

摘要翻译： 提供了一种在基板上形成无定形碳层的方法和装置。 具有高应力水平的无定形碳层的第一部分由具有高稀释比的烃前体形成，并且包括任选的胺前体以增加应力升高的氮。 通过降低烃前体的稀释比例和降低或除去胺气体，在第一部分上形成具有低应力水平的第二部分无定形碳层。 可以调节压力，温度和RF功率输入，而不是或除了前体流速，并且不同的前体可用于不同的应力水平。

公开(公告)号：US20120080779A1

公开(公告)日：2012-04-05

申请号：US13249794

申请日：2011-09-30

申请人： Martin Jay SEAMONS ,  Sudha RATHI ,  Kwangduk Douglas LEE ,  Deenesh PADHI ,  Bok Hoen KIM ,  Chiu CHAN

发明人： Martin Jay SEAMONS ,  Sudha RATHI ,  Kwangduk Douglas LEE ,  Deenesh PADHI ,  Bok Hoen KIM ,  Chiu CHAN

IPC分类号： H01L29/02 ,  C09D1/00 ,  H01L21/31

CPC分类号： H01L21/64 ,  C23C16/0272 ,  C23C16/26 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/31144

摘要： Embodiments of the present invention generally relate to the fabrication of integrated circuits and particularly to the deposition of a boron containing amorphous carbon layer on a semiconductor substrate. In one embodiment, a method of processing a substrate in a processing chamber is provided. The method comprises providing a substrate in a processing volume, flowing a hydrocarbon containing gas mixture into the processing volume, generating a plasma of the hydrocarbon containing gas mixture by applying power from an RF source, flowing a boron containing gas mixture into the processing volume, and depositing a boron containing amorphous carbon film on the substrate in the presence of the plasma, wherein the boron containing amorphous carbon film contains from about 30 to about 60 atomic percentage of boron.

摘要翻译： 本发明的实施例一般涉及集成电路的制造，特别涉及在半导体衬底上沉积含硼无定形碳层。 在一个实施例中，提供了一种在处理室中处理衬底的方法。 该方法包括在处理体积中提供衬底，使含烃气体混合物流入处理体积，通过从含有硼的气体混合物流入处理体积的RF源施加功率产生含烃气体混合物的等离子体， 以及在所述等离子体存在下在所述衬底上沉积含硼无定形碳膜，其中所述含硼无定形碳膜含有约30至约60原子百分比的硼。

公开(公告)号：US20120043518A1

公开(公告)日：2012-02-23

申请号：US12859230

申请日：2010-08-18

申请人： Siu F. CHENG ,  Heung Lak PARK ,  Deenesh PADHI

发明人： Siu F. CHENG ,  Heung Lak PARK ,  Deenesh PADHI

IPC分类号： H01L29/04 ,  H01L47/00

CPC分类号： H01L45/149 ,  C23C16/26 ,  C23C16/505 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1616

摘要： An electronic device comprises a variable resistance memory element on a substrate. The variable resistance memory element comprises (i) an amorphous carbon layer comprising a hydrogen content of at least about 30 atomic percent, and a maximum leakage current of less than about 1×10−9 amps, and (ii) a pair of electrodes about the amorphous carbon layer. Methods of fabricating this and other devices are also described.

摘要翻译： 电子设备包括在基板上的可变电阻存储元件。 可变电阻存储元件包括（i）包含至少约30原子％的氢含量和小于约1×10-9安培的最大漏电流的无定形碳层，以及（ii）一对电极 无定形碳层。 还描述了制造这种和其他装置的方法。

公开(公告)号：US20110303899A1

公开(公告)日：2011-12-15

申请号：US13158186

申请日：2011-06-10

申请人： Deenesh Padhi ,  Jacob Janzen ,  Shahid Shaikh ,  Bok Hoen Kim ,  Barry Chin

发明人： Deenesh Padhi ,  Jacob Janzen ,  Shahid Shaikh ,  Bok Hoen Kim ,  Barry Chin

IPC分类号： H01L21/20 ,  H01L29/16

CPC分类号： H01L21/0262 ,  H01J37/32091 ,  H01L21/02425 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02527 ,  H01L23/373 ,  H01L29/66742 ,  H01L29/78684 ,  H01L2924/0002 ,  H01L2924/00

摘要： Embodiments of the invention are directed toward the deposition of Graphene on a semiconductor substrate. In some embodiments, these processes can occur at low temperature levels during a back end of the line process. For example, Graphene can be deposited in a CVD reactor at a processing temperature that is below 600° C. to protect previously deposited layers that may be susceptible to sustained higher temperatures. Graphene deposition can include the deposition of an underlayer (e.g., cobalt) followed by the flow of a carbon precursor (e.g., acetylene) at the processing temperature. Graphene can then be synthesized with during cooling, an RTP cure, and/or a UV cure.

摘要翻译： 本发明的实施方案涉及在半导体衬底上沉积石墨烯。 在一些实施例中，这些过程可以在线路过程的后端期间以低温水平发生。 例如，石墨烯可以在低于600℃的处理温度下沉积在CVD反应器中，以保护可能易受持续较高温度影响的预先沉积的层。 石墨烯沉积可以包括在加工温度下沉积底层（例如钴），然后沉积碳前体（例如乙炔）。 然后可以在冷却，RTP固化和/或UV固化期间合成石墨烯。