Abstract:
A circuit current balancing apparatus balances circuit currents among units of a battery device. The circuit current balancing apparatus is provided with a plurality of cell stacks respectively composed of at least one cell. The apparatus balances a circuit current of a control circuit connected to each of the plurality of cell stacks for controlling and monitoring a status of the cell stack. The apparatus also includes a comparator for calculating and outputting a voltage difference between an output voltage of the corresponding cell stack and a voltage of the control circuit connected to the corresponding cell stack, and a current source for adding or subtract a dummy current to/from a circuit current of the control circuit in correspondence with the output of the comparator.
Abstract:
Disclosed is a switching circuit for balancing battery cells. The switching circuit includes plural pairs of switching means, each pair of which are connected to each other in parallel and interrupt a flow of electric current in a bi-direction in order to reduce the internal voltage applied to the switching means. According to the present invention, since the switching elements of low internal voltage can be used for the switching circuit, it is possible to constitute the switching circuit for cell balancing without use of switching elements of high internal voltage and to reduce the number of MOSFETs, thereby making it possible to design the switching circuit effectively. Since the MOSFETs having the low internal voltage and low resistance are used for the switching circuit, it is possible to reduce a loss of the electric current due to the resistance during the cell balancing, thereby improving the balancing efficiency and reducing heat generation.
Abstract:
Disclosed are system and method for adjusting a voltage balancing of cell in a lithium ion multicell battery pack The system comprises a multicell battery pack including a master module and a slave module; a CPU located in the system controller and outputting a synchronization signal for each of cells in the master module and the slave module, a first vertical interface transmitting the synchronization signal outputted from the CPU to the master module; and a second vertical interface transmitting the synchronization signal to the slave module through the first vertical interface. Accordingly, it is possible to read voltages of all cells in the one battery pack with a same timing and thus to prevent a cell voltage reading error due to the voltage reading time difference, thereby increasing an accuracy of a voltage balancing of the cells.