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    Electronic device having optical communicating part
    21.
    发明授权
    Electronic device having optical communicating part 有权
    具有光通信部的电子设备

    公开(公告)号：US08625938B2

    公开(公告)日：2014-01-07

    申请号：US13441585

    申请日：2012-04-06

    Applicant: Jong-joo Lee

    Inventor： Jong-joo Lee

    IPC: G02B6/12 ,  G02B6/42

    CPC classification number: G02B6/428 ,  G02B6/4202 ,  G02B6/4257 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00

    Abstract: An electronic device includes a substrate having a first surface and a second surface, a semiconductor device disposed on a first region on the first surface of the substrate, a via structure penetrating the substrate, and including a conductor, an optical channel disposed in the via structure, and an optical-electrical converting device disposed at an end of the via structure, electrically connected to the semiconductor device through the conductor of the via structure, and optically connected to the optical channel.

    Abstract translation: 电子设备包括具有第一表面和第二表面的基板，设置在基板的第一表面上的第一区域上的半导体器件，穿透基板的通孔结构，并且包括导体，设置在通孔中的光通道 结构，以及设置在通孔结构的端部处的光电转换装置，通过通孔结构的导体与半导体器件电连接，并且光学连接到光通道。

    ELECTRONIC DEVICE HAVING OPTICAL COMMUNICATING PART
    23.
    发明申请
    ELECTRONIC DEVICE HAVING OPTICAL COMMUNICATING PART 有权
    具有光通信部分的电子设备

    公开(公告)号：US20120314992A1

    公开(公告)日：2012-12-13

    申请号：US13441585

    申请日：2012-04-06

    Applicant: Jong-Joo Lee

    Inventor： Jong-Joo Lee

    IPC: G02B6/12

    CPC classification number: G02B6/428 ,  G02B6/4202 ,  G02B6/4257 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00

    Abstract: An electronic device includes a substrate having a first surface and a second surface, a semiconductor device disposed on a first region on the first surface of the substrate, a via structure penetrating the substrate, and including a conductor, an optical channel disposed in the via structure, and an optical-electrical converting device disposed at an end of the via structure, electrically connected to the semiconductor device through the conductor of the via structure, and optically connected to the optical channel.

    Abstract translation: 电子设备包括具有第一表面和第二表面的基板，设置在基板的第一表面上的第一区域上的半导体器件，穿透基板的通孔结构，并且包括导体，设置在通孔中的光通道 结构，以及设置在通孔结构的端部处的光电转换装置，通过通孔结构的导体与半导体器件电连接，并且光学连接到光通道。

    Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits and methods of fabricating the same
    25.
    发明授权
    Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits and methods of fabricating the same 有权
    具有直接连接到内部电路的电源/接地线的重新分配的电源/接地线的半导体芯片及其制造方法

    公开(公告)号：US08115315B2

    公开(公告)日：2012-02-14

    申请号：US12431956

    申请日：2009-04-29

    Applicant: Jong-Joo Lee

    Inventor： Jong-Joo Lee

    IPC: H01L23/48

    CPC classification number: H01L23/5286 ,  H01L21/84 ,  H01L27/10894 ,  H01L27/1203 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2224/05552

    Abstract: Provided are embodiments of semiconductor chips having a redistributed metal interconnection directly connected to power/ground lines of an internal circuit are provided. Embodiments of the semiconductor chips include an internal circuit formed on a semiconductor substrate. A chip pad is disposed on the semiconductor substrate. The chip pad is electrically connected to the internal circuit through an internal interconnection. A passivation layer is provided over the chip pad. A redistributed metal interconnection is provided on the passivation layer. The redistributed metal interconnection directly connects the internal interconnection to the chip pad through a via-hole and a chip pad opening, which penetrate at least the passivation layer. Methods of fabricating the semiconductor chip are also provided.

    Abstract translation: 提供了具有直接连接到内部电路的电源/接地线的重分布金属互连的半导体芯片的实施例。 半导体芯片的实施例包括形成在半导体衬底上的内部电路。 芯片焊盘设置在半导体衬底上。 芯片焊盘通过内部互连电连接到内部电路。 钝化层设置在芯片焊盘的上方。 在钝化层上设置重新分布的金属互连。 再分布的金属互连通过穿孔至少钝化层的通孔和芯片焊盘开口将内部互连直接连接到芯片焊盘。 还提供了制造半导体芯片的方法。

    Stack package
    26.
    发明授权
    Stack package 有权
    堆栈包

    公开(公告)号：US08097940B2

    公开(公告)日：2012-01-17

    申请号：US12588382

    申请日：2009-10-14

    Applicant: Seung-Duk Baek ,  Sun-Won Kang ,  Jong-Joo Lee

    Inventor： Seung-Duk Baek ,  Sun-Won Kang ,  Jong-Joo Lee

    IPC: H01L23/02

    CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/06136 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73257 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    Abstract: A stack package may include a substrate having first and second faces opposite each other and an opening formed therein. The first semiconductor chip may be mounted on the first face of the substrate and include a through electrode in the middle region of the first semiconductor chip that is exposed through the opening. The second semiconductor chip may be stacked on the first semiconductor chip and electrically connected to the first semiconductor chip by the through electrode of the first semiconductor chip. The circuit pattern may be formed on the second face of the substrate and include a bonding pad arranged adjacent to the opening and electrically connected to the through electrode of the first semiconductor chip through the opening, an outer connection pad spaced apart from the bonding pad and a connection wiring extending from the opening to the outer connection pad via the bonding pad.

    Abstract translation: 堆叠包装可以包括具有彼此相对的第一和第二面以及其中形成的开口的衬底。 第一半导体芯片可以安装在基板的第一面上，并且在通过开口暴露的第一半导体芯片的中间区域中包括通孔。 第二半导体芯片可以堆叠在第一半导体芯片上并且通过第一半导体芯片的通孔电连接到第一半导体芯片。 电路图案可以形成在基板的第二面上，并且包括邻近开口布置的焊盘，并且通过开口与第一半导体芯片的通孔电连接，与焊盘间隔开的外连接焊盘和 连接配线，从连接焊盘的开口延伸到外部连接焊盘。

    Package board having internal terminal interconnection and semiconductor package employing the same
    27.
    发明授权
    Package board having internal terminal interconnection and semiconductor package employing the same 有权
    具有内部端子互连的封装板和采用其的半导体封装

    公开(公告)号：US07745922B2

    公开(公告)日：2010-06-29

    申请号：US11424605

    申请日：2006-06-16

    Applicant: Jong-Joo Lee

    Inventor： Jong-Joo Lee

    IPC: H01L23/52

    CPC classification number: H01L23/50 ,  H01L23/49822 ,  H01L23/66 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05548 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2224/05599 ,  H01L2224/05099

    Abstract: A package board is provided. The package board includes a board body having a front surface and a back surface. A first power pad, a first ground pad, a first signal pad, a first internal terminal pad and a second internal terminal pad are disposed on the front surface of the board body, and a second power pad, a second ground pad and a second signal pad are disposed on the back surface of the board body. The second power pad, the second ground pad and the second signal pad are electrically connected to the first power pad, the first ground pad and the first signal pad, respectively. An internal terminal interconnection is provided in a bulk region of the board body or on a surface of the board body. The internal terminal interconnection electrically connects the first internal terminal pad to the second internal terminal pad. A semiconductor package employing the package board is also provided.

    Abstract translation: 提供一个包装板。 封装板包括具有前表面和后表面的板体。 第一电源焊盘，第一接地焊盘，第一信号焊盘，第一内部端子焊盘和第二内部端子焊盘设置在板主体的前表面上，第二电源焊盘，第二接地焊盘和第二焊盘 信号垫设置在板体的背面。 第二电源焊盘，第二接地焊盘和第二信号焊盘分别电连接到第一电源焊盘，第一接地焊盘和第一信号焊盘。 内部端子互连设置在电路板主体的主体区域或电路板主体的表面上。 内部端子互连将第一内部端子焊盘电连接到第二内部端子焊盘。 还提供了采用封装板的半导体封装。

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