公开(公告)号：US5731293A

公开(公告)日：1998-03-24

申请号：US580364

申请日：1995-12-28

申请人： Koju Watanabe ,  Koichi Niimura ,  Toru Yamazaki ,  Hiroshi Maruoka

发明人： Koju Watanabe ,  Koichi Niimura ,  Toru Yamazaki ,  Hiroshi Maruoka

IPC分类号： C12N9/99 ,  A61K31/365 ,  A61K31/535 ,  A61K31/70 ,  A61K31/7042 ,  A61K31/7048 ,  A61P1/02 ,  A61P11/00 ,  A61P13/02 ,  A61P15/00 ,  A61P17/00 ,  A61P27/02 ,  A61P29/00 ,  A61P43/00 ,  C07D311/16 ,  C07H1/00 ,  C07H17/075 ,  A61K31/35 ,  C07D313/06 ,  C07H15/24

CPC分类号： C07H17/075 ,  C07D311/16

摘要： A compound of the formula (I): ##STR1## wherein R.sup.1 and R.sup.2 are, independently, --CON(R.sup.4)R.sup.5, or a monosaccharide, or acylated monosaccharide group, with the proviso that at least one of R.sup.1 and R.sup.2 is --CON(R.sup.4)R.sup.5, and R.sup.4 and R.sup.5 are, independently, a hydrogen atom, or a hydroxyl, alkyl, aryl, or aralkyl group, or R.sup.4 and R.sup.5 together with the nitrogen atom attached thereto form a 3- to 7-membered saturated cycloaliphatic amino group, and R.sup.3 is a hydrogen atom, or a hydroxyl, alkyl, aryl, aralkyl, or --COOR.sup.8 group, and R.sup.3 is at 3- or 4-position, and R.sup.8 is a hydrogen atom or an alkyl group, or a salt thereof is disclosed. The compound has a function to inhibit a matrix metalloproteinase.

摘要翻译： 式（I）的化合物：其中R 1和R 2独立地为-CON（R 4）R 5，或单糖或酰化单糖基团，条件是R 1和R 2中的至少一个 是-CON（R4）R5，R4和R5独立地是氢原子或羟基，烷基，芳基或芳烷基，或R4和R5与连接的氮原子一起形成3-至7- R 3为氢原子或羟基，烷基，芳基，芳烷基或-COOR 8基，R 3为3-或4-位，R 8为氢原子或烷基， 或其盐。 该化合物具有抑制基质金属蛋白酶的功能。

公开(公告)号：US5494846A

公开(公告)日：1996-02-27

申请号：US354557

申请日：1994-12-13

申请人： Toru Yamazaki

发明人： Toru Yamazaki

IPC分类号： H01L21/76 ,  H01L21/02 ,  H01L21/265 ,  H01L21/762 ,  H01L27/08 ,  H01L27/12

CPC分类号： H01L21/76264 ,  H01L21/76267 ,  H01L21/76283

摘要： Oxygen ions are partially implanted into a semiconductor substrate 1 to form an oxygen ion implantation area. Then, a trench 2 surrounding the oxygen ion implantation area is formed in the semiconductor substrate 1 so as to remove the outer peripheral portion of the oxygen ion implantation area. Then, the semiconductor substrate 1 are heat treated to turn the oxygen ion implantation area into a buried oxide film 4 which is stable. Then, an insulating film 3 is buried into the trench 2.

摘要翻译： 将氧离子部分地注入到半导体衬底1中以形成氧离子注入区域。 然后，在半导体衬底1中形成围绕氧离子注入区的沟槽2，以去除氧离子注入区的外周部分。 然后，对半导体基板1进行热处理，将氧离子注入区域变为稳定的埋入氧化膜4。 然后，将绝缘膜3埋入沟槽2中。

公开(公告)号：US5440152A

公开(公告)日：1995-08-08

申请号：US348216

申请日：1994-11-28

申请人： Toru Yamazaki

发明人： Toru Yamazaki

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/205 ,  H01L29/732 ,  H01L29/737 ,  H01L27/00 ,  H01L27/082

CPC分类号： H01L29/7378 ,  H01L27/0623

摘要： A semiconductor device with HBT that enables the cutoff frequency of the HBT to be restrained from lowering at higher collector current levels. The HBT has an emitter region, a SiGe base region, and first and second SiGe collector regions. The first collector region is adjacent to the base region. The base region has a first distribution of Ge concentration graded as a function of depth. The Ge concentration of the first distribution increases at a first gradient as a function of depth from a base-emitter junction to a base-collector junction. The first and second collector regions have second and third distributions of Ge concentration graded as a function of depth. A minimum Ge concentration of the second distribution is not lower than a maximum Ge concentration of the third distribution. In the vicinity of an interface of the first and second collector regions, Ge concentration of the second distribution decreases at a second gradient as a function of depth to the interface, Ge concentration of the third distribution decreases at a third gradient smaller than the second gradient as a function of depth from the interface toward an opposite end of the interface.

摘要翻译： 具有HBT的半导体器件能够在更高的集电极电流水平下抑制HBT的截止频率的降低。 HBT具有发射极区域，SiGe基极区域以及第一和第二SiGe集电极区域。 第一集电极区域与基极区域相邻。 基区具有作为深度的函数分级的Ge浓度的第一分布。 第一分布的Ge浓度作为从基极 - 发射极结到基极 - 集电极结的深度的函数的第一梯度增加。 第一和第二集电区具有第二和第三分布的Ge浓度作为深度的函数。 第二分布的最小Ge浓度不低于第三分布的最大Ge浓度。 在第一和第二集电区域的界面附近，第二分布的Ge浓度作为与界面深度的函数的第二梯度减小，第三分布的Ge浓度以比第二梯度小的第三梯度减小 作为从界面到界面的相对端的深度的函数。

公开(公告)号：US5306940A

公开(公告)日：1994-04-26

申请号：US779878

申请日：1991-10-21

申请人： Toru Yamazaki

发明人： Toru Yamazaki

IPC分类号： H01L21/762 ,  H01L27/02 ,  H01L27/04 ,  H01L29/06

CPC分类号： H01L21/76235 ,  H01L21/76202

摘要： In a semiconductor device having an element isolation region including a LOCOS type field oxide film formed in a surface of a silicon substrate and a U-trench isolation region provided in the silicon substrate, the U-trench isolation region is constituted with a U-trench provided such that it penetrates the field oxide film, a channel stopper provided in a portion of the silicon substrate exposed on a bottom face of the U-trench, a first film in a form of a silicon oxide film formed by thermal oxidation of an exposed portion of the silicon substrate in the U-trench, a second film comprising a buried layer having thermal reflow characteristics and burying the U-trench, a third film having non-thermal reflow characteristics and having a top face substantially coplanar with a top face of the field oxide film and a bottom face connected to a top face of the second films and a fourth film in a form of an insulating film connected to the top face of the third film at an upper end of said U-trench and covering the U-trench. In the element isolation region having this structure, there is no leakage current produced due to thermal oxidation of a polysilicon film buried in the U-trench, contrary to the conventional U-trench isolation region having buried polysilicon film. Further, increase of parasitic capacitance which is caused by thermal oxidation of the buried polysilicon layer can be also restricted.

摘要翻译： 在具有形成在硅衬底的表面中的LOCOS型场氧化膜和设置在硅衬底中的U沟槽隔离区的元件隔离区的半导体器件中，U沟隔离区由U沟槽 被设置为穿透所述场氧化物膜，设置在所述硅衬底的暴露在所述U形沟槽的底面上的部分中的沟道阻挡层，通过曝光的氧化膜的热氧化形成的氧化硅膜形式的第一膜 所述U型沟槽中的所述硅衬底的一部分，包括具有热回流特性并埋入所述U沟槽的掩埋层的第二膜，具有非热回流特性的第三膜，并且具有与所述U型沟槽的顶面基本共面的顶面 所述场氧化物膜和连接到所述第二膜的顶面的底面和在所述Ut的上端连接到所述第三膜的顶面的绝缘膜形式的第四膜 并且覆盖了U沟。 在具有这种结构的元件隔离区域中，与具有掩埋多晶硅膜的常规U沟槽隔离区域相反，不存在由于埋入U沟槽中的多晶硅膜的热氧化而产生的漏电流。 此外，也可以限制由掩埋多晶硅层的热氧化引起的寄生电容的增加。

公开(公告)号：US5136958A

公开(公告)日：1992-08-11

申请号：US729759

申请日：1991-07-15

申请人： Minoru Nakano ,  Toru Yamazaki

发明人： Minoru Nakano ,  Toru Yamazaki

IPC分类号： D05B45/00 ,  D05B47/04

CPC分类号： D05B47/04 ,  D05B45/00

摘要： An automatic thread supply device for a conventional overlocking sewing machine is disclosed. Each of a needle thread, an upper looper thread and a lower looper thread is supplied to a thread supply roller but the supply is stopped for an optimum period by a thread holder, whereby the supply length of each thread is adjusted. In forming a thread chain, the total supply length of the looper threads is not more than five times of the length of the needle thread, and the smallest length of the above threads is not more than half of the total length of the remaining threads. In this way, a highly expandable thread chain is formed having a good appearance.

公开(公告)号：US4926069A

公开(公告)日：1990-05-15

申请号：US233072

申请日：1988-08-17

申请人： Toru Yamazaki

发明人： Toru Yamazaki

IPC分类号： H03K19/00 ,  H03K19/0944

CPC分类号： H03K19/0013 ,  H03K19/09448

摘要： A Bi-MOS circuit includes an input terminal, an output terminal, an N-channel MOS transistor having a gate connected to the input terminal, a source connected to the ground and a drain, an NPN bipolar transistor having a collector connected to a first power voltage line, an emitter connected to the output terminal and a base connected to a drain of the N-channel MOS transistor, a load element connected between the base of the NPN bipolar transistor and a second power voltage line lower than the first power voltage line and a switching element connected between the output terminal and the ground and having a control electrode connected to the input terminal, the switching element connecting the output terminal and the ground when a first level of input signal turning the N-channel MOS transistor on is inputted to the input terminal and disconnecting the output terminal from the ground when a second level of the input signal turning the N-channel MOS transistor off is inputted to the input terminal.

公开(公告)号：US4824812A

公开(公告)日：1989-04-25

申请号：US125713

申请日：1987-11-25

申请人： Toshiki Saburi ,  Nobuyuki Ohya ,  Toru Yamazaki ,  Taisei Katoh

发明人： Toshiki Saburi ,  Nobuyuki Ohya ,  Toru Yamazaki ,  Taisei Katoh

IPC分类号： C04B35/00 ,  C04B35/497 ,  H01B3/12

CPC分类号： C04B35/497

摘要： A high frequency wave absorbing ceramics can be used, for example, as an EMI preventive filter for interrupting high frequency wave intruding into electronic circuits. The high frequency wave absorbing ceramics are composed of a ternary composition comprising from 50 to 82.5 mol % of lead iron niobate Pb(Fe1/2Nb1/2)O.sub.3, from 17.5 to 40 mol % of lead iron tungstate Pb(Fe2/3W1/3)O.sub.3 and not more than 25 mole % of lead cobalt niobate Pb(Co1/3Nb2/3)O.sub.3 based on the total 100 mol % of a composition composed of lead iron niobate Pb(Fe1/2Nb1/2)O.sub.3, lead iron tungstate Pb(Fe2/3W1/3)O.sub.3 and lead cobalt niobate Pb(Co1/3Nb2/3)O.sub.3.

摘要翻译： 可以使用高频吸波陶瓷，例如用作中断高频波侵入电子电路的EMI防止滤波器。 高频吸波陶瓷由含有50〜82.5摩尔％的铌酸铅铅（Fe1 / 2Nb1 / 2）O3，17.5〜40摩尔％的铅铁铅Pb（Fe2 / 3W1 / 3）的三元组成构成 ）O3和不超过25摩尔％的铌酸铅铅（Co1 / 3Nb2 / 3）O3，基于由铌酸铅铅（Fe1 / 2Nb1 / 2）O3组成的组合物的总计100摩尔％，钨酸铅铁 Pb（Fe2 / 3W1 / 3）O3和铌酸铅钴（Co1 / 3Nb2 / 3）O3。

公开(公告)号：US4782310A

公开(公告)日：1988-11-01

申请号：US911999

申请日：1986-09-26

申请人： Toshiki Saburi ,  Nobuyuki Ohya ,  Toru Yamazaki ,  Taisei Katoh

发明人： Toshiki Saburi ,  Nobuyuki Ohya ,  Toru Yamazaki ,  Taisei Katoh

IPC分类号： H04B1/10 ,  H01R13/719 ,  H03H1/00 ,  H03H7/01 ,  H03H7/075 ,  H05K1/02

CPC分类号： H01R13/7195 ,  H01R23/6873 ,  H03H1/0007 ,  H05K1/0231 ,  H05K1/0233 ,  H05K2201/10189 ,  H05K2201/10454 ,  H05K2201/10522 ,  H05K2201/1053

摘要： A high frequency filter assembly for an electric instrument including an internal electric circuit element arranged within a casing of metallic conductive material, and a connector mounted on a peripheral wall of the casing for connecting an external electric circuit to the internal electric circuit element. The filter assembly comprises at least a pair of overlapped insulation thin plates to be arranged between the connector and a connection terminal of the circuit element, and an earth electrode strip disposed between the insulation thin plates and being connected to a portion of the casing. One of the insulation thin plates is integrally provided with a first signal electrode strip which has one end for connection to the connector and is associated with the earth electrode strip to form a first plate condenser, and the other insulation thin plate is integrally provided with a second signal electrode strip which is connected structurally in series with the first signal electrode strip for connection to the connection terminal of the circuit element and associated with the earth electrode strip to form a second plate condenser electrically in parallel connection with the first plate condenser.

摘要翻译： 一种用于电气仪器的高频滤波器组件，包括布置在金属导电材料的壳体内的内部电路元件，以及安装在壳体的周壁上的用于将外部电路连接到内部电路元件的连接器。 所述过滤器组件包括至少一对重叠的绝缘薄板，其布置在所述连接器和所述电路元件的连接端子之间，以及接地电极条，设置在所述绝缘薄板之间并连接到所述壳体的一部分。 一个绝缘薄板一体地设置有第一信号电极带，其具有用于连接到连接器的一端并与接地电极带相关联以形成第一板式冷凝器，另一绝缘薄板一体地设置有 第二信号电极条，其在结构上与第一信号电极条串联连接，用于连接到电路元件的连接端子并与接地电极条相关联，以形成与第一板式冷凝器并联连接的第二板式电容器。

公开(公告)号：US4413527A

公开(公告)日：1983-11-08

申请号：US366087

申请日：1982-04-06

申请人： Junzi Sugiura ,  Hiroshi Okada ,  Michitaka Hayashi ,  Toru Yamazaki ,  Hiroshi Sugimoto

发明人： Junzi Sugiura ,  Hiroshi Okada ,  Michitaka Hayashi ,  Toru Yamazaki ,  Hiroshi Sugimoto

IPC分类号： G01L9/00 ,  G01L9/04 ,  G01L19/00 ,  H05K9/00 ,  G01L9/08

CPC分类号： G01L19/143 ,  G01L19/0084 ,  G01L19/069 ,  G01L19/147 ,  Y10S73/04

摘要： A semiconductor pressure sensor has an encased sensor unit, and a metal casing having a pressure introduction pipe and housing therein the sensor unit. The metal casing has therein synthetic resin poured by potting to fix the sensor unit securely in the metal casing. Through-type capacitors are affixed to the metal casing. The sensor unit produces an electrical signal transmitted out through the through-type capacitors and over lead wires connected to the through-type capacitors. With this arrangement, the semiconductor pressure sensor is protected against electromagnetic interference (EMI), and moisture is prevented from entering the metal casing.

摘要翻译： 半导体压力传感器具有封装的传感器单元和具有压力引入管并且在其中容纳传感器单元的金属外壳。 金属外壳内装有通过灌封浇注的合成树脂，以将传感器单元牢固地固定在金属外壳中。 通过电容器固定在金属外壳上。 传感器单元产生通过通过型电容器传输的电信号和连接到通过型电容器的引线。 利用这种布置，半导体压力传感器被保护免受电磁干扰（EMI），防止湿气进入金属外壳。

公开(公告)号：US4119368A

公开(公告)日：1978-10-10

申请号：US753539

申请日：1976-12-22

申请人： Toru Yamazaki

发明人： Toru Yamazaki

IPC分类号： G03G16/00 ,  G02B26/00 ,  G02B27/50 ,  G02F1/19 ,  G09F9/30 ,  G02F1/00

CPC分类号： G02B26/00

摘要： An elastomer display device which can discriminate by unaided visual observation a pattern to be displayed by utilizing elastic deformation of an elastomer produced upon application of an electric voltage thereto is disclosed. The device comprises a transparent substrate and four laminated coatings consisting of a transparent electric conductive membrane pattern to be displayed, a transparent elastomer coating, a metal reflecting coating and an electric conductive elastomer coating. Between the transparent electric conductive membrane pattern and the elastomer coating is interposed a transparent insulating coating which functions to decrease the voltage required for driving the elastomer display device. On the electric conductive elastomer coating is formed an opposed electrode formed of metal or electric conductive resin which functions to apply the voltage to overall surface of the display device. At least one of the electric conductive elastomer coating, transparent elastomer coating, metal reflecting coating and opposed electrode is formed into a pattern-shape which functions to prevent electric field from spreading out of the pattern and prevent frost-shaped surface deformation from being projected out of the pattern, thereby providing an elastomer display device having a high resolving power.

摘要翻译： 公开了一种弹性体显示装置，其可以通过肉眼观察来鉴别通过利用在施加电压时产生的弹性体的弹性变形而显示的图案。 该装置包括透明基板和由待显示的透明导电膜图案，透明弹性体涂层，金属反射涂层和导电弹性体涂层组成的四个层压涂层。 在透明导电膜图案和弹性体涂层之间插入透明绝缘涂层，其用于降低驱动弹性体显示装置所需的电压。 在导电弹性体涂层上形成由用于将电压施加到显示装置的整个表面的金属或导电树脂形成的相对电极。 导电弹性体涂层，透明弹性体涂层，金属反射涂层和相对电极中的至少一个形成为图案形状，其功能是防止电场扩散出图案，并防止霜状表面变形被突出 的图案，从而提供具有高分辨能力的弹性体显示装置。