PROGRAMMABLE DESERIALIZER
    21.
    发明申请
    PROGRAMMABLE DESERIALIZER 有权
    可编程DESERIALIZER

    公开(公告)号:US20110006932A1

    公开(公告)日:2011-01-13

    申请号:US12499065

    申请日:2009-07-07

    申请人: Yan-Bin Luo

    发明人: Yan-Bin Luo

    IPC分类号: H03M9/00

    CPC分类号: H03M9/00

    摘要: A deserializer for converting serial data into at least one parallel data includes a first flip-flop group, a second flip-flop group and a programmable frequency divider. The first flip-flop group includes a plurality of flip-flops connected in series, where the first flip-flop group is controlled by a first clock signal. The second flip-flop group includes a plurality of flip-flops, where the second flip-flop group is controlled by a second clock signal, and the flip-flops of the second flip-flop group are respectively connected to output nodes of the flip-flops of the first flip-flop group. The programmable frequency divider is coupled to each of the flip-flops of the second flip-flop group, and is utilized for receiving a control signal and generating the second clock signal by performing a frequency-dividing operation according to a frequency-dividing factor set by the control signal.

    摘要翻译: 用于将串行数据转换成至少一个并行数据的解串器包括第一触发器组,第二触发器组和可编程分频器。 第一触发器组包括串联连接的多个触发器,其中第一触发器组由第一时钟信号控制。 第二触发器组包括多个触发器,其中第二触发器组由第二时钟信号控制,并且第二触发器组的触发器分别连接到翻盖的输出节点 - 第一个触发器组的翻页。 可编程分频器耦合到第二触发器组的每个触发器,并且用于通过根据分频因子集执行分频操作来接收控制信号并产生第二时钟信号 通过控制信号。

    Level shifter for high-speed and low-leakage operation
    22.
    发明授权
    Level shifter for high-speed and low-leakage operation 有权
    电平移位器用于高速和低泄漏操作

    公开(公告)号:US07777547B2

    公开(公告)日:2010-08-17

    申请号:US11944418

    申请日:2007-11-22

    申请人: Yan-Bin Luo

    发明人: Yan-Bin Luo

    IPC分类号: H03L5/00

    CPC分类号: H03K3/35613 H03K3/012

    摘要: The present invention discloses a voltage level shifter capable of interfacing between two circuit systems having different operating voltage swings. The voltage level shifter comprises an input buffer having a low supply voltage for inverting an external input signal to an internal input signal, and an output buffer having a high supply voltage for inverting the internal input signal to an external output signal. The high level of the external input signal is lower than the high level of the external output signal. The voltage level shifter is designed such that the input buffer is operating to achieve a low-leakage and high-speed performance.

    摘要翻译: 本发明公开了一种能够在具有不同工作电压摆幅的两个电路系统之间进行接口的电压电平移位器。 电压电平移位器包括具有用于将外部输入信号反相至内部输入信号的低电源电压的输入缓冲器和具有用于将内部输入信号反相到外部输出信号的高电源电压的输出缓冲器。 外部输入信号的高电平低于外部输出信号的高电平。 电压电平转换器被设计成使得输入缓冲器正在操作以实现低泄漏和高速性能。