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116 条记录 (耗时 0.037 秒)

    Method to extract and apply circuit features in organic substrate for automation of warp modeling
    21.
    发明授权
    Method to extract and apply circuit features in organic substrate for automation of warp modeling 失效
    提取和应用电路特征的方法，用于有机衬底自动化的翘曲建模

    公开(公告)号：US08127255B2

    公开(公告)日：2012-02-28

    申请号：US12260957

    申请日：2008-10-29

    申请人： Hien Phu Dang ,  Vijayeshwar Das Khanna ,  Arun Sharma ,  Sri M. Sri-Jayantha

    发明人： Hien Phu Dang ,  Vijayeshwar Das Khanna ,  Arun Sharma ,  Sri M. Sri-Jayantha

    IPC分类号： G06F17/50

    CPC分类号： H05K3/0005 ,  H05K1/0271 ,  H05K2201/09136

    摘要： A method of characterizing an organic substrate including a plurality of circuit layers is provided includes the steps of: receiving an image of the organic substrate, the image including a geometric description of the circuit layers of the substrate; segmenting the substrate into multiple processing regions based, at least in part, on geometric coordinates of circuit structures defined in the image of the substrate; generating a circuit layer image corresponding to a selected one of the processing regions of the substrate; identifying one or more geometric features in the circuit layer image; estimating at least one thermomechanical property of the circuit layer image as a function of the identified geometric features; repeating the steps of receiving an image, generating a circuit layer image, identifying one or more geometric features in the circuit layer image, and estimating at least one thermomechanical property of the circuit layer image until all circuit layers in the substrate have been processed; and generating a 3-D representation of the selected one of the processing regions of the substrate including the plurality of circuit layer images as a function of the at least one thermomechanical property of each of the plurality of circuit layer images.

    摘要翻译： 提供了表征包括多个电路层的有机衬底的方法包括以下步骤：接收有机衬底的图像，该图像包括衬底的电路层的几何描述; 至少部分地基于在衬底的图像中限定的电路结构的几何坐标将衬底分割成多个处理区域; 生成与所述基板的所述选择的一个所述处理区域对应的电路层图像; 识别电路层图像中的一个或多个几何特征; 估计电路层图像的至少一个热机械性质作为所识别的几何特征的函数; 重复接收图像的步骤，生成电路层图像，识别电路层图像中的一个或多个几何特征，以及估计电路层图像的至少一个热机械特性，直到已经处理了基板中的所有电路层; 以及根据所述多个电路层图像中的每一个的所述至少一个热机械特性，生成包括所述多个电路层图像的所述基板的所选择的一个处理区域的3-D表示。

    Packaging substrate having pattern-matched metal layers
    22.
    发明授权
    Packaging substrate having pattern-matched metal layers 有权
    具有图案匹配金属层的包装基板

    公开(公告)号：US07901998B2

    公开(公告)日：2011-03-08

    申请号：US12775970

    申请日：2010-05-07

    申请人： Sri M. Sri-Jayantha ,  Hien P. Dang ,  Vijayeshwar D. Khanna ,  Arun Sharma

    发明人： Sri M. Sri-Jayantha ,  Hien P. Dang ,  Vijayeshwar D. Khanna ,  Arun Sharma

    IPC分类号： H01L21/44 ,  H01L21/48

    CPC分类号： H05K1/0271 ,  H01L23/49833 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K3/0005 ,  H05K3/4644 ,  H05K2201/09136 ,  H05K2201/09227 ,  H05K2203/1572 ,  Y10T29/49004 ,  Y10T29/49155 ,  H01L2924/00

    摘要： A pattern matched pair of a front metal interconnect layer and a back metal interconnect layer having matched thermal expansion coefficients are provided for a reduced warp packaging substrate. Metal interconnect layers containing a high density of wiring and complex patterns are first developed so that interconnect structures for signal transmission are optimized for electrical performance. Metal interconnect layers containing a low density wiring and relatively simple patterns are then modified to match the pattern of a mirror image metal interconnect layer located on the opposite side of the core and the same number of metal interconnect layer away from the core. During this pattern-matching process, the contiguity of electrical connection in the metal layers with a low density wiring may become disrupted. The disruption is healed by an additional design step in which the contiguity of the electrical connection in the low density is reestablished.

    摘要翻译： 提供具有匹配的热膨胀系数的前金属互连层和背金属互连层的图案匹配对，用于经缩短的经向包装基板。 首先开发了包含高密度布线和复杂图案的金属互连层，使得用于信号传输的互连结构被优化用于电性能。 然后修改包含低密度布线和相对简单图案的金属互连层，以匹配位于芯的相对侧上的镜像金属互连层的图案和与芯相距相同数量的金属互连层。 在这种模式匹配过程中，具有低密度布线的金属层中的电连接的连续性可能会被破坏。 通过额外的设计步骤来治愈中断，其中重新建立低密度电连接的邻接性。

    Insulin related transcription factor and uses thereof
    27.
    发明授权
    Insulin related transcription factor and uses thereof 失效
    胰岛素相关转录因子及其用途

    公开(公告)号：US07695961B2

    公开(公告)日：2010-04-13

    申请号：US11838068

    申请日：2007-08-13

    申请人： Arun Sharma

    发明人： Arun Sharma

    IPC分类号： C12N5/00 ,  C12N5/02

    CPC分类号： C07K14/705

    摘要： The invention provides isolated mMafA polypeptides, nucleic acids, vectors and host cells containing them, which encode a novel insulin related transcription factor. Diagnostic methods, methods of selecting and differentiating insulin-producing cells, and methods of treatment utilizing compositions of the invention are also provided.

    摘要翻译： 本发明提供了分离的mMafA多肽，核酸，载体和含有它们的宿主细胞，其编码新的胰岛素相关转录因子。 还提供诊断方法，选择和区分胰岛素产生细胞的方法，以及利用本发明组合物的治疗方法。

    Variable-length compression technique for encoding or decoding a sequence of integers
    28.
    发明授权
    Variable-length compression technique for encoding or decoding a sequence of integers 有权
    用于编码或解码整数序列的可变长度压缩技术

    公开(公告)号：US07652596B1

    公开(公告)日：2010-01-26

    申请号：US12346672

    申请日：2008-12-30

    申请人： Arun Sharma ,  Dean Gaudet

    发明人： Arun Sharma ,  Dean Gaudet

    IPC分类号： H03M7/40

    CPC分类号： H03M7/40

    摘要： The described embodiments provide a system that encodes a sequence of integers using a variable-length compression technique. During operation, the system scans the sequence of integers and observes the sizes of the integers to determine a threshold value, K, from the observed sizes. For a given integer of length N bits, if N−K is greater than zero, the system generates a tag for the encoded integer comprising a sequence of N−K zeros followed by a one, and generates a set of remaining bits for the encoded integer as a sequence of the N−1 least-significant bits which make up the integer. Otherwise, the system generates a tag for the encoded integer as a single one, and generates a set of remaining bits for the encoded integer by padding the N bits which make up the integer with zeros so that the set of remaining bits is K bits in length.

    摘要翻译： 所描述的实施例提供了使用可变长度压缩技术对整数序列进行编码的系统。 在操作期间，系统扫描整数序列，并观察整数的大小，以根据观察到的尺寸确定阈值K。 对于长度为N位的给定整数，如果NK大于零，则系统生成包含一个NK零序列的经编码整数的标签，后跟一个，并且将编码整数的剩余位生成一个序列 的N-1个最低有效位组成整数。 否则，系统将编码整数的标签生成为一个整数，并通过用零填充构成整数的N个比特来生成编码整数的一组剩余比特，以便剩下的比特数的集合是K比特 长度。

    Variable-length compression technique for encoding or decoding a sequence of integers
    29.
    发明授权
    Variable-length compression technique for encoding or decoding a sequence of integers 有权
    用于编码或解码整数序列的可变长度压缩技术

    公开(公告)号：US07609000B1

    公开(公告)日：2009-10-27

    申请号：US12042981

    申请日：2008-03-05

    申请人： Arun Sharma

    发明人： Arun Sharma

    IPC分类号： H03M7/40

    CPC分类号： H03M7/40

    摘要： A system that encodes a sequence of integers using a variable-length compression technique is described. During operation, the system scans the sequence of integers and observes the sizes of the integers to determine a threshold value K from the observed sizes. For a given integer which is N bits in length, if N−K is greater than or equal to zero, the system generates a tag for the encoded integer which comprises a sequence of N−K zeros followed by a one, and generates a set of remaining bits for the encoded integer as a sequence of the N bits which make up the integer. Otherwise, if N−K is less than zero, the system generates a tag for the encoded integer as a single one, and generates a set of remaining bits for the encoded integer by padding the N bits which make up the integer with zeros so that the set of remaining bits is K bits in length.

    摘要翻译： 描述了使用可变长度压缩技术对整数序列进行编码的系统。 在操作期间，系统扫描整数序列并观察整数的大小，以根据观察到的尺寸确定阈值K. 对于长度为N位的给定整数，如果NK大于或等于零，则系统生成编码整数的标签，其包括一个NK零序列，后跟一个序列，并产生一组剩余的位，用于 编码整数作为构成整数的N位的序列。 否则，如果NK小于0，则系统生成一个编码整数的标签作为单个标签，并通过用零填充N位来生成编码整数的一组剩余位，以使集合 剩余位的长度为K位。