摘要:
Provided is a semiconductor device that includes first and second isolation patterns disposed on a substrate. Alternately stacked interlayer insulating patterns and a conductive patterns are disposed on a surface of the substrate between the first and second isolation patterns. A support pattern penetrates the conductive patterns and the interlayer insulating patterns and has a smaller width than the first and second isolation patterns. First and second vertical structures are disposed between the first isolation and the support pattern and penetrate the conductive patterns and the interlayer insulating patterns. A second vertical structure is disposed between the second isolation pattern and the support pattern and penetrates the conductive patterns and the interlayer insulating patterns. A distance between top and bottom surfaces of the support pattern is greater than a distance between a bottom surface of the support pattern and the surface of the substrate.
摘要:
Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate doped with a first conductive type dopant, a plurality of stacked structures arranged side by side on the substrate and extending in a first direction, each of the stacked structures including gate electrodes spaced apart from each other, the plurality of stacked structures including a pair of stacked structures spaced apart from each other at a first interval in a second direction perpendicular to the first direction, and a pick-up region extending in the first direction in the substrate between the pair of stacked structures and doped with the first conductive type dopant.
摘要:
Three dimensional semiconductor memory devices are provided. The three dimensional semiconductor memory device includes a first stacked structure and a second stacked structure sequentially stacked on a substrate. The first stacked structure includes first insulating patterns and first gate patterns which are alternately and repeatedly stacked on a substrate, and the second stacked structure includes second insulating patterns and second gate patterns which are alternately and repeatedly stacked on the first stacked structure. A plurality of first vertical active patterns penetrate the first stacked structure, and a plurality of second vertical active patterns penetrate the second stacked structure. The number of the first vertical active patterns is greater than the number of the second vertical active patterns.
摘要:
A secondary battery includes an electrode assembly in which a cathode plate and an anode plate are arranged with a separator being interposed therebetween, a case in which the electrode assembly is received, a cap assembly capable of sealing an open end of the case, a gasket interposed between the case and the cap assembly, and a leakage prevention portion formed at one surface of the gasket and/or one surface of the cap assembly, which is oriented toward the electrode assembly and contacted with the gasket.
摘要:
Disclosed herein is a folding device to manufacture a stacked/folded type electrode assembly having unit cells sequentially stacked in a state in which a separation film is disposed between the respective unit cells, the folding device including a web supply unit to supply a web having plate-shaped unit cells arranged at a top of a separation film at predetermined intervals, a winding jig to rotate the unit cells while holding a first one of the unit cells of the web so that the unit cells are sequentially stacked in a state in which the separation film is disposed between the respective unit cells, and a rotary shaft compensation unit to compensate for the position of a rotary shaft of the winding jig in an advancing direction of the web (X-axis direction), wherein the rotary shaft compensation unit periodically changes the position of the rotary shaft to compensate for the change in X-axis velocity (Vx) of the web caused during winding of the plate-shaped unit cells, thereby uniformly maintaining tension of the web.
摘要:
Methods of fabricating a three-dimensional semiconductor device are provided. Methods may include forming a stack structure including first layers and second layers alternately stacked on a substrate, patterning the stack structure to form at least one isolation trench, forming channel structures penetrating the stack structure and being spaced apart from the isolation trench, and forming upper interconnection lines on the stack structure to connect the channel structures to each other. An isolation trench may be formed prior to formation of the channel structures.
摘要:
Disclosed herein is a circuit and method for generating a boost element drive signal in a semiconductor memory device with a mode register set signal. The boost element drive signal generation circuit includes a preliminary drive signal generation unit and a level shifter. The preliminary drive signal generation unit generates a preliminary drive signal in response to a group of mode setting signals. The mode setting signal group is provided from a mode register set. The level shifter generates the boost element drive signal in response to the preliminary drive signal. The pull-up voltage of the boost element drive signal is level-shifted relative to a pull-up voltage of the preliminary drive signal. According to the boost element drive signal generation circuit of the present invention, the activation instant of a boost element drive signal is controlled by a mode setting signal group. Therefore, the boost element drive signal is activated after a boost voltage is stabilized. Therefore, in a semiconductor memory device to which the boost element drive signal generation circuit of the present invention is applied, leakage current flowing through a normal inverter that has an input terminal for receiving the output signal of a boost inverter is greatly decreased.
摘要:
A semiconductor device includes a plurality of insulation patterns and a plurality of gates alternately and repeatedly stacked on a substrate, a channel pattern extending through the gates in a first direction substantially perpendicular to a top surface of the substrate, a semiconductor pattern between the channel pattern and the substrate, and a conductive pattern between the channel pattern and the semiconductor pattern. The conductive pattern electrically connects the channel pattern to the semiconductor pattern. The conductive pattern contacts a bottom edge of the channel pattern and an upper surface of the semiconductor pattern.
摘要:
A semiconductor memory device includes: a semiconductor region extending vertically from a first region of a substrate; a plurality of gate electrodes disposed on the first region of the substrate in a vertical direction, but separated from each other along a sidewall of the semiconductor region; a gate dielectric layer disposed between the semiconductor region and the plurality of gate electrodes; a substrate contact electrode extending vertically from the impurity-doped second region of the substrate; and an insulating region formed as an air gap between the substrate contact electrode and at least one of the plurality of gate electrodes.
摘要:
A vertical type semiconductor device includes first and second word line structures that include first and second word lines. The word lines surround a plurality of pillar structures, which are provided to connect the word lines to corresponding string select lines. Connecting patterns electrically connect pairs of adjacent first and second word lines in a same plane. The device may be a nonvolatile memory device or a different type of device.