利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

168 条记录 (耗时 0.034 秒)

    STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON GERMANIUM LAYER
    22.
    发明申请
    STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON GERMANIUM LAYER 审中-公开
    通过阳极氧化P +硅锗层的分级制备的绝缘硅绝缘体

    公开(公告)号：US20080277690A1

    公开(公告)日：2008-11-13

    申请号：US12176624

    申请日：2008-07-21

    申请人： Thomas N. Adam ,  Stephen W. Bedell ,  Joel P. de Souza ,  Keith E. Fogel ,  Alexander Reznicek ,  Devendra K. Sadana ,  Ghavam Shahidi

    发明人： Thomas N. Adam ,  Stephen W. Bedell ,  Joel P. de Souza ,  Keith E. Fogel ,  Alexander Reznicek ,  Devendra K. Sadana ,  Ghavam Shahidi

    IPC分类号： H01L27/12

    CPC分类号： H01L21/76259 ,  Y10S438/967

    摘要： A cost efficient and manufacturable method of fabricating strained semiconductor-on-insulator (SSOI) substrates is provided that avoids wafer bonding. The method includes growing various epitaxial semiconductor layers on a substrate, wherein at least one of the semiconductor layers is a doped and relaxed semiconductor layer underneath a strained semiconductor layer; converting the doped and relaxed semiconductor layer into a porous semiconductor via an electrolytic anodization process, and oxidizing to convert the porous semiconductor layer into a buried oxide layer. The method provides a SSOI substrate that includes a relaxed semiconductor layer on a substrate; a high-quality buried oxide layer on the relaxed semiconductor layer; and a strained semiconductor layer on the high-quality buried oxide layer. In accordance with the present invention, the relaxed semiconductor layer and the strained semiconductor layer have identical crystallographic orientations.

    摘要翻译： 提供了制造应变半导体绝缘体（SSOI）衬底的成本有效和可制造的方法，其避免晶片接合。 该方法包括在衬底上生长各种外延半导体层，其中半导体层中的至少一个是在应变半导体层下面的掺杂和弛豫半导体层; 通过电解阳极氧化处理将掺杂和松弛的半导体层转化成多孔半导体，并氧化以将多孔半导体层转化为掩埋氧化物层。 该方法提供了在衬底上包括松弛半导体层的SSOI衬底; 在松弛的半导体层上形成高质量的掩埋氧化物层; 以及在高质量掩埋氧化物层上的应变半导体层。 根据本发明，松弛半导体层和应变半导体层具有相同的晶体取向。

    Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer
    23.
    发明授权
    Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer 有权
    通过弹性应变转移形成的超薄，高品质应变绝缘体上的绝缘体

    公开(公告)号：US07442993B2

    公开(公告)日：2008-10-28

    申请号：US11293774

    申请日：2005-12-02

    申请人： Stephen W. Bedell ,  Anthony G. Domenicucci ,  Keith E. Fogel ,  Effendi Leobandung ,  Devendra K. Sadana

    发明人： Stephen W. Bedell ,  Anthony G. Domenicucci ,  Keith E. Fogel ,  Effendi Leobandung ,  Devendra K. Sadana

    IPC分类号： H01L31/392

    CPC分类号： H01L29/78696 ,  H01L21/0237 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02521 ,  H01L21/02667 ,  H01L21/02694 ,  H01L21/76251 ,  H01L29/7842

    摘要： A method of forming a semiconductor structure comprising a first strained semiconductor layer over an insulating layer is provided in which the first strained semiconductor layer is relatively thin (less than about 500 Å) and has a low defect density (stacking faults and threading defects). The method of the present invention begins with forming a stress-providing layer, such a SiGe alloy layer over a structure comprising a first semiconductor layer that is located atop an insulating layer. The stress-providing layer and the first semiconductor layer are then patterned into at least one island and thereafter the structure containing the at least one island is heated to a temperature that causes strain transfer from the stress-providing layer to the first semiconductor layer. After strain transfer, the stress-providing layer is removed from the structure to form a first strained semiconductor island layer directly atop said insulating layer.

    摘要翻译： 提供了一种在绝缘层上形成包括第一应变半导体层的半导体结构的方法，其中第一应变半导体层相对较薄（小于约）并且具有低缺陷密度（堆垛层错和穿线缺陷）。 本发明的方法开始于在包括位于绝缘层顶部的第一半导体层的结构上形成应力提供层，例如SiGe合金层。 然后将应力提供层和第一半导体层图案化成至少一个岛，然后将含有至少一个岛的结构加热到使得应力转移从应力提供层到第一半导体层的温度。 在应变转移之后，将应力提供层从结构上去除，以形成直接位于所述绝缘层顶部的第一应变半导体岛层。

    Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion
    24.
    发明授权
    Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion 有权
    使用氢气注入来改善由热扩散制成的绝缘体上硅材料的材料特性

    公开(公告)号：US07304328B2

    公开(公告)日：2007-12-04

    申请号：US10982411

    申请日：2004-11-05

    申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Devendra K. Sadana

    发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Devendra K. Sadana

    IPC分类号： H01L21/336

    CPC分类号： H01L21/76243 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02664 ,  Y10S438/933

    摘要： A method of forming a relaxed SiGe-on-insulator substrate having enhanced relaxation, significantly lower defect density and improved surface quality is provided. The method includes forming a SiGe alloy layer on a surface of a first single crystal Si layer. The first single crystal Si layer has an interface with an underlying barrier layer that is resistant to Ge diffusion. Next, ions that are capable of forming defects that allow mechanical decoupling at or near said interface are implanted into the structure and thereafter the structure including the implanted ions is subjected to a heating step which permits interdiffusion of Ge throughout the first single crystal Si layer and the SiGe layer to form a substantially relaxed, single crystal and homogeneous SiGe layer atop the barrier layer. SiGe-on-insulator substrates having the improved properties as well as heterostructures containing the same are also provided.

    摘要翻译： 提供了一种形成松弛的绝缘体上硅衬底的方法，其具有增强的松弛，显着降低缺陷密度和改进的表面质量。 该方法包括在第一单晶Si层的表面上形成SiGe合金层。 第一单晶硅层具有与Ge扩散耐受的下层阻挡层的界面。 接下来，能够形成允许在界面处或附近机械解耦的缺陷的离子被注入到结构中，此后包括注入的离子的结构经受加热步骤，其允许Ge贯穿整个第一单晶Si层和 SiGe层，以形成在阻挡层顶上基本上松弛的单晶和均匀的SiGe层。 还提供了具有改进性能的绝缘体上硅衬底以及含有其的异质结构。

    Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal
    25.
    发明授权
    Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal 失效
    通过整体高温SIMOX-Ge相互扩散退火形成绝缘体上硅锗（SGOI）

    公开(公告)号：US07084050B2

    公开(公告)日：2006-08-01

    申请号：US11039602

    申请日：2005-01-19

    申请人： Stephen W. Bedell ,  Joel P. de Souza ,  Keith E. Fogel ,  Devendra K. Sadana ,  Ghavam G. Shahidi

    发明人： Stephen W. Bedell ,  Joel P. de Souza ,  Keith E. Fogel ,  Devendra K. Sadana ,  Ghavam G. Shahidi

    IPC分类号： H01L21/20 ,  H01L21/76 ,  H01L21/31

    CPC分类号： H01L21/76243 ,  H01L21/26506 ,  H01L21/76267 ,  Y10T428/12674 ,  Y10T428/12681

    摘要： A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implanted-ion rich region in the Si-containing substrate. The implanted-ion rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.

    摘要翻译： 提供了使用SIMOX和Ge相互扩散形成基本上松弛的，优质的绝缘体上硅衬底材料的方法。 该方法包括首先将离子注入到含Si衬底中以在含Si衬底中形成植入离子富集区。 注入离子富集区具有足够的离子浓度，使得在随后的高温退火期间形成耐Ge扩散的阻挡层。 接下来，在含Si衬底的表面上形成Ge含有层，然后在允许形成阻挡层和Ge的相互扩散的温度下进行加热步骤，从而形成基本上松弛的单晶SiGe层 阻挡层顶部。

    Method of improving the quality of defective semiconductor material
    27.
    发明授权
    Method of improving the quality of defective semiconductor material 失效
    提高缺陷半导体材料质量的方法

    公开(公告)号：US06825102B1

    公开(公告)日：2004-11-30

    申请号：US10664714

    申请日：2003-09-18

    申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Shreesh Narasimha ,  Devendra K. Sadana

    发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Shreesh Narasimha ,  Devendra K. Sadana

    IPC分类号： H01L21263

    CPC分类号： H01L21/02667 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/2022 ,  Y10S438/933

    摘要： A method in which a defective semiconductor crystal material is subjected to an amorphization step followed by a thermal treatment step is provided. The amorphization step amorphizes, partially or completely, a region, including the surface region, of a defective semiconductor crystal material. A thermal treatment step is next performed so as to recrystallize the amorphized region of the defective semiconductor crystal material. The recrystallization is achieved in the present invention by solid-phase crystal regrowth from the non-amorphized region of the defective semiconductor crystal material.

    摘要翻译： 提供一种方法，其中对缺陷半导体晶体材料进行非晶化步骤之后进行热处理步骤。 非晶化步骤使部分地或完全地形成缺陷半导体晶体材料的区域，包括表面区域。 接下来进行热处理步骤，以便使缺陷半导体晶体材料的非晶化区域再结晶。 通过从缺陷半导体晶体材料的非非晶化区域的固相晶体再生长，在本发明中实现了重结晶。

    Germanium-containing release layer for transfer of a silicon layer to a substrate
    29.
    发明授权
    Germanium-containing release layer for transfer of a silicon layer to a substrate 有权
    含锗释放层，用于将硅层转移到基底

    公开(公告)号：US08933456B2

    公开(公告)日：2015-01-13

    申请号：US13616322

    申请日：2012-09-14

    申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Daniel A. Inns ,  Jeehwan Kim ,  Devendra K. Sadana ,  Katherine L. Saenger

    发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Daniel A. Inns ,  Jeehwan Kim ,  Devendra K. Sadana ,  Katherine L. Saenger

    IPC分类号： H01L29/38 ,  H01L21/02 ,  H01L21/762

    CPC分类号： H01L21/0262 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02664 ,  H01L21/76254

    摘要： A germanium-containing layer is deposited on a single crystalline bulk silicon substrate in an ambient including a level of oxygen partial pressure sufficient to incorporate 1%-50% of oxygen in atomic concentration. The thickness of the germanium-containing layer is preferably limited to maintain some degree of epitaxial alignment with the underlying silicon substrate. Optionally, a graded germanium-containing layer can be grown on, or replace, the germanium-containing layer. An at least partially crystalline silicon layer is subsequently deposited on the germanium-containing layer. A handle substrate is bonded to the at least partially crystalline silicon layer. The assembly of the bulk silicon substrate, the germanium-containing layer, the at least partially crystalline silicon layer, and the handle substrate is cleaved within the germanium-containing layer to provide a composite substrate including the handle substrate and the at least partially crystalline silicon layer. Any remaining germanium-containing layer on the composite substrate is removed.

    摘要翻译： 含锗层沉积在单一晶体体硅衬底上，包括足以以原子浓度掺入1％-50％的氧的氧分压水平。 含锗层的厚度优选被限制以保持与底层硅衬底的一定程度的外延对准。 任选地，可以在含锗层上生长或替代含锗层。 随后将至少部分结晶的硅层沉积在含锗层上。 手柄基板结合到至少部分结晶的硅层。 本体硅衬底，含锗层，至少部分结晶的硅层和处理衬底的组件在含锗层内被切割以提供复合衬底，该复合衬底包括处理衬底和至少部分结晶的硅 层。 去除复合衬底上任何剩余的含锗层。