公开(公告)号：US20070148876A1

公开(公告)日：2007-06-28

申请号：US11452036

申请日：2006-06-12

申请人： Jae-Seon Yu

发明人： Jae-Seon Yu

IPC分类号： H01L21/8239 ,  H01L21/8238

CPC分类号： H01L21/823842 ,  H01L21/823828 ,  H01L27/1052 ,  H01L27/10876 ,  H01L27/10894 ,  H01L29/66621

摘要： A method for fabricating a semiconductor device includes: forming a first polysilicon layer of a first conductive type over a substrate divided into a cell region and a peripheral region, the first polysilicon layer covering the peripheral region and opening predetermined recess portions of the cell region; etching the predetermined recess portions using the first polysilicon layer as an etch mask to form recesses; forming a second polysilicon layer of a second conductive type over the substrate in the cell region and the first polysilicon layer remaining in the peripheral region after the recesses are formed; selectively removing the second polysilicon layer formed over the remaining first polysilicon layer in the peripheral region; planarizing the second polysilicon layer in the cell region; and patterning the second polysilicon layer in the cell region and the first polysilicon layer in the peripheral region to form gate patterns in a dual poly-recess structure.

摘要翻译： 一种制造半导体器件的方法，包括：在分为单元区域和周边区域的衬底上形成第一导电类型的第一多晶硅层，所述第一多晶硅层覆盖所述周边区域并且打开所述单元区域的预定凹部; 使用第一多晶硅层作为蚀刻掩模蚀刻预定的凹部以形成凹部; 在形成所述凹部之后，在所述单元区域中的所述衬底上形成第二导电类型的第二多晶硅层和残留在所述周边区域中的所述第一多晶硅层; 选择性地去除在周边区域中剩余的第一多晶硅层上形成的第二多晶硅层; 平坦化细胞区域中的第二多晶硅层; 以及在所述单元区域中的所述第二多晶硅层和所述周边区域中的所述第一多晶硅层构图，以形成双重多凹槽结构中的栅极图案。