摘要:
A method of fabricating a nonvolatile memory device includes forming a tunnel insulating layer on a semiconductor substrate, forming a charge storage layer on the tunnel insulating layer, forming a dielectric layer on the charge storage layer, the dielectric layer including a first aluminum oxide layer, a silicon oxide layer, and a second aluminum oxide layer sequentially stacked on the charge storage layer, and forming a gate electrode on the dielectric layer, the gate electrode directly contacting the second aluminum oxide layer of the dielectric layer.
摘要:
Embodiments of the present invention provide methods of manufacturing memory devices including forming floating gate patterns on a semiconductor substrate having active regions thereon, wherein the floating gate patterns cover the active regions and are spaced apart from the active regions; forming an inter-gate dielectric layer on the semiconductor substrate having the floating gate patterns by alternately stacking a zirconium oxide layer and an aluminum oxide layer at least once, wherein the inter-gate dielectric layer is formed by a deposition process using O3 gas as a reactive gas; forming a control gate layer on the inter-gate dielectric layer; and forming a control gate, an inter-gate dielectric layer pattern and a floating gate by sequentially patterning the control gate layer, the inter-gate dielectric layer and the floating gate pattern, wherein the inter-gate dielectric layer pattern and the control gate are sequentially stacked across the active regions, and the floating gate is formed between the active regions and the inter-gate dielectric layer pattern Memory devices, such as flash memory devices are also provided.
摘要:
In a gate structure of a non-volatile memory device is formed, a tunnel insulating layer and a charge trapping layer are formed on a substrate. A composite dielectric layer is formed on the charge trapping layer and has a laminate structure in which first material layers including aluminum oxide and second material layers including hafnium oxide or zirconium oxide are alternately stacked. A conductive layer is formed on the composite dielectric layer and then a gate structure is formed by patterning the conductive layer, the composite dielectric layer, the charge trapping layer, and the tunnel insulating layer.
摘要:
Example embodiments of the present invention disclose a non-volatile semiconductor memory device, which may include a dielectric layer having an enhanced dielectric constant. A tunnel oxide layer pattern and a floating gate may be sequentially formed on a substrate. A dielectric layer pattern including metal oxide doped with Group III transition metals may be formed on the floating gate using a pulsed laser deposition process. The dielectric layer pattern having an increased dielectric constant may be formed of metal oxide doped with a transition metal such as scandium, yttrium, or lanthanum.
摘要:
A method of fabricating a floating trap type nonvolatile memory device includes forming a cell gate insulating layer on a semiconductor substrate, the cell gate insulating layer being comprised of a lower insulating layer, a charge storage layer and an upper insulating layer sequentially stacked; thermally annealing the cell gate insulating Layer at a temperature of approximately 810° C. to approximately 1370° C.; and forming a gate electrode on the thermally annealed cell gate insulating layer.
摘要:
In a gate structure of a non-volatile memory device is formed, a tunnel insulating layer and a charge trapping layer are formed on a substrate. A composite dielectric layer is formed on the charge trapping layer and has a laminate structure in which first material layers including aluminum oxide and second material layers including hafnium oxide or zirconium oxide are alternately stacked. A conductive layer is formed on the composite dielectric layer and then a gate structure is formed by patterning the conductive layer, the composite dielectric layer, the charge trapping layer, and the tunnel insulating layer.
摘要:
A method of manufacturing a non-volatile memory device includes forming a tunnel isolation layer forming a tunnel isolation layer on a substrate, forming a conductive pattern on the tunnel isolation layer, forming a lower silicon oxide layer on the conductive pattern, treating a surface portion of the lower silicon oxide layer with a nitridation treatment to form a first silicon oxynitride layer on the lower silicon oxide layer, forming a metal oxide layer on the first silicon oxynitride layer, forming an upper silicon oxide layer on the metal oxide layer, and forming a conductive layer on the upper silicon oxide layer.
摘要:
A method of manufacturing a semiconductor device comprises forming a lower electrode on a substrate using a titanium chloride pulsed deposition (TPD) process, forming a high-k dielectric layer on the lower electrode, and forming an upper electrode on the dielectric layer using a TPD process. The method further comprises forming a reaction barrier layer between the upper or lower electrode and the dielectric layer using an atomic layer deposition (ALD) process. The upper electrode is preferably formed with a processing temperature between 350 and 500° C., and the dielectric layer preferably comprises zirconium oxide.
摘要:
A method of manufacturing a non-volatile memory device includes forming a tunnel isolation layer forming a tunnel isolation layer on a substrate, forming a conductive pattern on the tunnel isolation layer, forming a lower silicon oxide layer on the conductive pattern, treating a surface portion of the lower silicon oxide layer with a nitridation treatment to form a first silicon oxynitride layer on the lower silicon oxide layer, forming a metal oxide layer on the first silicon oxynitride layer, forming an upper silicon oxide layer on the metal oxide layer, and forming a conductive layer on the upper silicon oxide layer.
摘要:
Example embodiments of the present invention disclose a non-volatile semiconductor memory device, which may include a dielectric layer having an enhanced dielectric constant. A tunnel oxide layer pattern and a floating gate may be sequentially formed on a substrate. A dielectric layer pattern including metal oxide doped with Group III transition metals may be formed on the floating gate using a pulsed laser deposition process. The dielectric layer pattern having an increased dielectric constant may be formed of metal oxide doped with a transition metal such as scandium, yttrium, or lanthanum.