公开(公告)号：US20160149675A1

公开(公告)日：2016-05-26

申请号：US14949036

申请日：2015-11-23

Applicant: Intel Corporation

Inventor： Adee O. Ran ,  Kent C. Lusted

IPC: H04L1/24

CPC classification number: H04L1/248 ,  H04L1/203 ,  H04L1/244

Abstract: One embodiment provides an apparatus. The example apparatus includes a root mean square (RMS) distortion determination module configured to determine an RMS distortion error and a signal to noise and distortion ratio (SNDR), the RMS distortion error determined based, at least in part, on a portion of a transmitted pulse centered at or near a transmitted pulse maximum amplitude and the SNDR determined based, at least in part, on the RMS distortion error.

公开(公告)号：US09344146B2

公开(公告)日：2016-05-17

申请号：US13793063

申请日：2013-03-11

Applicant: Intel Corporation

Inventor： Kent C. Lusted ,  Adee O. Ran

IPC: H04L12/28 ,  H04B3/40 ,  H04L5/14 ,  H04L25/02 ,  H04J1/16

CPC classification number: H04B3/40 ,  H04L5/1438 ,  H04L25/0204 ,  H04L25/0226

Abstract: Methods, apparatus and systems for de-correlating training pattern sequences for high-speed links and interconnects. The high-speed links and interconnects employs multiple lanes in each direction for transmitting and receiving data, and may be physically implemented via signal paths in an inter-plane board such as a backplane or mid-plane, or via a cable. During link training, a training pattern comprising a pseudo random bit sequence (PBRS) is sent over each lane. The PBRS for each lane is generated by a PBRS generator based on a PRBS polynomial that is unique to that lane. Since each lane employs a different PRBS polynomial, the training patterns between lanes are substantially de-correlated. Link negotiation may be performed between link endpoints to ensure that the PBRS polynomials used for all of the lanes in the high-speed link or interconnect are unique. Exemplary uses include Ethernet links, Infiniband links, and multi-lane serial interconnects.

Abstract translation: 用于高速链路和互连的训练模式序列去相关的方法，装置和系统。 高速链路和互连在每个方向上采用多个通道用于发送和接收数据，并且可以通过诸如背板或中间平面之间的平面板中的信号路径或经由电缆物理地实现。 在链路训练期间，通过每个通道发送包括伪随机位序列（PBRS）的训练模式。 每个通道的PBRS由PBRS发生器基于该通道唯一的PRBS多项式生成。 由于每个车道采用不同的PRBS多项式，车道之间的训练模式基本上是不相关的。 可以在链路端点之间执行链路协商，以确保用于高速链路或互连中所有通道的PBRS多项式是唯一的。 示例性用途包括以太网链路，Infiniband链路和多通道串行互连。

公开(公告)号：US09112722B2

公开(公告)日：2015-08-18

申请号：US13870186

申请日：2013-04-25

Applicant: INTEL CORPORATION

Inventor： Kent C. Lusted ,  Adee O. Ran

IPC: H04L12/413 ,  H04L7/10

CPC classification number: H04L12/413 ,  H04L7/10

Abstract: Methods, apparatus and systems for implementing Physical Media Attachment (PMA) alignment and rapid transition from a link training mode to a data mode for next-generation high-speed Ethernet links including a 100 Gbps Ethernet link. Training frames are transmitted between first and second Ethernet interfaces on opposing ends of the link in a pair-wise manner, with a first training frame being sent from a first Ethernet interface and a second training frame being returned from the second Ethernet interface. The training frames have a length that is the same as the length of Physical Media Attachment (PMA) frames, and the returned training frames include receiver readiness status indicia identifying a readiness status of a local receiver port, and countdown data. The readiness status indicia, and countdown data are employed to facilitate a rapid transition from the link training mode to the data mode.

Abstract translation: 实现物理媒体附件（PMA）对齐的方法，装置和系统以及从链路训练模式到包括100Gbps以太网链路的下一代高速以太网链路的数据模式的快速切换。 训练帧以成对的方式在链路的相对端上的第一和第二以太网接口之间传输，第一训练帧从第一以太网接口发送，第二训练帧从第二以太接口返回。 训练帧的长度与物理媒体附件（PMA）帧的长度相同，返回的训练帧包括识别本地接收机端口准备状态的接收器准备状态标志和倒计时数据。 采用准备状态标记和倒计时数据来促进从链接训练模式到数据模式的快速转换。

公开(公告)号：US09031093B2

公开(公告)日：2015-05-12

申请号：US13758259

申请日：2013-02-04

Applicant: Intel Corporation

Inventor： Kent C. Lusted ,  Adee O. Ran

IPC: H04J3/16 ,  H04L12/12 ,  H04L12/40

CPC classification number: H04L12/12 ,  H04L12/40039 ,  H04L12/40136 ,  Y02D50/10 ,  Y02D50/40 ,  Y02D50/42

Abstract: Methods, apparatus and systems for implementing for implementing Energy-Efficient Ethernet (EEE) refresh and wake signaling for high-speed Ethernet links. During an EEE refresh or wake signaling period, ALERT frames are transmitted between first and second Ethernet interfaces on opposing ends of the link, with a first ALERT frame being sent from a first Ethernet interface and a second ALERT frame being returned from the second Ethernet interface. The ALERT frames have a length that is different that the length of Physical Media Attachment (PMA) frames, and the returned ALERT frames include frame alignment offset data identifying a relative offset between an ALERT frame and a predetermined location in a PMA frame, and countdown data. The frame alignment offset data and countdown data are employed to facilitate a rapid transition from the link training mode to the data mode.

Abstract translation: 用于实现高速以太网链路的高效以太网（EEE）刷新和唤醒信号的实现方法，装置和系统。 在EEE刷新或唤醒信令期间，ALERT帧在链路的相对端的第一和第二以太网接口之间传输，第一ALERT帧从第一以太网接口发送，第二ALERT帧从第二以太网接口返回 。 ALERT帧的长度与物理媒体附件（PMA）帧的长度不同，并且返回的ALERT帧包括标识ALERT帧和PMA帧中的预定位置之间的相对偏移的帧对准偏移数据，以及倒计时 数据。 采用帧对准偏移数据和倒计数数据来促进从链接训练模式到数据模式的快速转变。