Microprocessor for debugging programs
    22.
    发明授权
    Microprocessor for debugging programs 失效
    用于调试程序的微处理器

    公开(公告)号:US5379301A

    公开(公告)日:1995-01-03

    申请号:US151246

    申请日:1993-11-12

    CPC分类号: G06F11/3648

    摘要: A microprocessor, comprising a register 18 for setting either a first mode in which a trap instruction is not executed, or a second mode in which the trap instruction can be executed is set, wherein an instruction decoding circuit 23, in case of operating in the first mode, outputs an internal signal SG1 directing execution of a subroutine call, when decoding a subroutine call instruction, to an instruction executing unit 14, and in case of operating in the second mode, outputs the internal signal SG1 directing execution of a trap when decoding the subroutine call instruction, to the instruction executing unit 14. By such a configuration, a break can be effected in a unit of subroutine under a simple control when debugging the program, and by enabling the breaking without decoding a program to be debugged, the debugging can be effected efficiently under a real time environment.

    摘要翻译: 设置有用于设定不执行陷阱指令的第一模式的寄存器18或其中可执行陷阱指令的第二模式的微处理器,其中指令解码电路23在 第一模式,在将子程序调用指令解码时,输出指示执行子程序调用的内部信号SG1到指令执行单元14,并且在第二模式下操作的情况下,输出指示陷阱执行的内部信号SG1, 将子程序调用指令解码到指令执行单元14.通过这样的配置,可以在调试程序时以简单控制的单个子程序进行中断,并且通过在不解码要调试的程序的情况下进行断开, 可以在实时环境下有效地进行调试。