Shift register
    21.
    发明授权
    Shift register 有权
    移位寄存器

    公开(公告)号:US08953737B2

    公开(公告)日:2015-02-10

    申请号:US14270779

    申请日:2014-05-06

    Abstract: Disclosed herein is a shift register in which leakage of charges from a voltage at a set node is prevented to stabilize an output from a stage. The shift register includes a plurality of stages for sequentially outputting scan pulses. Each stage includes a node controller for controlling signal states of a set node and a reset node, and an output unit supplied with any one of a plurality of clock pulses having different phases. The output unit outputs the supplied clock pulse as a scan pulse through an output terminal thereof according to the signal states of the set node and reset node. The node controller includes a first discharging switching device which is turned on or off in response to a scan pulse from a downstream stage. The first discharging switching device is connected between any one of a plurality of clock transfer lines and the set node.

    Abstract translation: 这里公开了一种移位寄存器,其中阻止了来自设定节点处的电压的电荷泄漏以稳定级的输出。 移位寄存器包括用于顺序地输出扫描脉冲的多个级。 每个级包括用于控制设定节点和复位节点的信号状态的节点控制器,以及提供有具有不同相位的多个时钟脉冲中的任何一个的输出单元。 输出单元根据设定节点和复位节点的信号状态,通过其输出端输出所提供的时钟脉冲作为扫描脉冲。 节点控制器包括响应于来自下游级的扫描脉冲而导通或关断的第一放电开关装置。 第一放电开关装置连接在多个时钟传输线中的任何一个和设定节点之间。

    SHIFT REGISTER
    22.
    发明申请
    SHIFT REGISTER 有权
    移位寄存器

    公开(公告)号:US20140376682A1

    公开(公告)日:2014-12-25

    申请号:US14308577

    申请日:2014-06-18

    CPC classification number: G11C19/28 G09G2310/0286

    Abstract: Disclosed is a shift register capable of stably generating an output even when the threadhold voltage of a pull-down switching element is raised due to degradation of the pull-down switching element. The shift register includes a plurality of stages each comprising a node controller comprising an inverter to control a voltage at a reset node in accordance with a voltage at a set node, and an output unit to output a scan pulse based on at least one of the voltage at the set node and the voltage at the reset node. The shift register further includes an inverter voltage controller for controlling a high-level inverter voltage supplied to each inverter of the stages based on the voltage at at least one reset node in at least one of the stages.

    Abstract translation: 公开了一种即使当下拉开关元件的螺纹保持电压由于下拉开关元件的劣化而升高时也能够稳定地产生输出的移位寄存器。 移位寄存器包括多个级,每个级包括节点控制器,该节点控制器包括根据设置节点处的电压来控制复位节点处的电压的反相器,以及输出单元,用于基于以下步骤中的至少一个来输出扫描脉冲: 设置节点处的电压和复位节点处的电压。 移位寄存器还包括逆变器电压控制器,用于基于至少一个级中的至少一个复位节点上的电压来控制提供给各级的每个反相器的高电平的反相器电压。

    Shift register
    23.
    发明授权
    Shift register 有权
    移位寄存器

    公开(公告)号:US08842803B2

    公开(公告)日:2014-09-23

    申请号:US13721336

    申请日:2012-12-20

    Inventor: Yong-Ho Jang

    Abstract: Disclosed herein is a shift register which is capable of preventing leakage of charges at a set node which occurs when the duty ratio of a scan pulse is small, so as to normally output a scan pulse. The shift register includes a plurality of stages for sequentially generating outputs thereof. Each of the stages includes a carry output unit for outputting a carry pulse to drive at least one of a downstream stage and an upstream stage, and a scan output unit for outputting a scan pulse to drive a gate line. Each of the outputs generated from the stages includes the carry pulse and the scan pulse. The carry pulse and the scan pulse are paired to correspond to each other. The paired carry pulse and scan pulse have different durations.

    Abstract translation: 这里公开了一种移位寄存器,其能够防止当扫描脉冲的占空比小时发生的设定节点处的电荷泄漏,以便正常输出扫描脉冲。 移位寄存器包括用于顺序地产生其输出的多个级。 每个级包括用于输出进位脉冲以驱动下游级和上游级中的至少一级的进位输出单元和用于输出扫描脉冲以驱动栅极线的扫描输出单元。 从级产生的每个输出包括进位脉冲和扫描脉冲。 进位脉冲和扫描脉冲配对成对应。 成对进位脉冲和扫描脉冲具有不同的持续时间。

    Shift register
    24.
    发明授权
    Shift register 有权
    移位寄存器

    公开(公告)号:US08718225B2

    公开(公告)日:2014-05-06

    申请号:US13960534

    申请日:2013-08-06

    CPC classification number: G11C19/00 G11C19/28

    Abstract: Discussed herein is a shift register which is capable of stabilizing an output thereof. The shift register includes a plurality of stages for sequentially outputting scan pulses in such a manner that high durations of the scan pulses partially overlap with each other. Each of the stages includes a node controller for controlling a charging duration of a set node, and an output unit for outputting a corresponding one of the scan pulses through an output terminal for the charging duration of the set node.

    Abstract translation: 这里讨论的是能够稳定其输出的移位寄存器。 移位寄存器包括多个级,用于顺序地输出扫描脉冲,使得扫描脉冲的高持续时间彼此部分重叠。 每个级包括用于控制设定节点的充电持续时间的节点控制器,以及用于通过输出端输出对应的一个扫描脉冲以用于设定节点的充电持续时间的输出单元。

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