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42 条记录 (耗时 0.026 秒)

    Disk array device with selectable method for generating redundant data
    22.
    发明授权
    Disk array device with selectable method for generating redundant data 失效
    磁盘阵列设备，可选择生成冗余数据的方法

    公开(公告)号：US06961816B2

    公开(公告)日：2005-11-01

    申请号：US10601892

    申请日：2003-06-24

    申请人： Eiju Katsuragi ,  Mikito Ogata ,  Akira Kurano ,  Toshihiko Tamiya ,  Akira Yamamoto ,  Naoya Takahashi

    发明人： Eiju Katsuragi ,  Mikito Ogata ,  Akira Kurano ,  Toshihiko Tamiya ,  Akira Yamamoto ,  Naoya Takahashi

    IPC分类号： G06F12/16 ,  G06F3/06 ,  G06F11/00 ,  G06F11/10 ,  G06F12/00 ,  G11B20/18

    CPC分类号： G06F11/1076 ,  G06F2211/1054 ,  G06F2211/1066

    摘要： A disk array device selects a redundant generation method for reducing the overhead and improving the reliability associated with generating redundant data. The disk array device includes a disk controller connected to and controlling an array of disk drives. The disk controller includes a redundant data generator, a difference data generator, and a redundant data generation method selector. The redundant data generator is able to generate redundant data via a read and modify method and an all stripes method. The disk array device selects a method of generating redundant data from a method of read and modify and all stripes, and a method of generation in a drive and a method of difference, both of which are executed to generate redundant data on a disk drive.

    摘要翻译： 磁盘阵列设备选择用于减少开销并提高与生成冗余数据相关联的可靠性的冗余生成方法。 磁盘阵列设备包括连接到并控制磁盘驱动器阵列的磁盘控制器。 磁盘控制器包括冗余数据生成器，差分数据生成器和冗余数据生成方法选择器。 冗余数据生成器能够通过读取和修改方法和全部条纹方法生成冗余数据。 磁盘阵列装置从读取和修改的方法以及所有条带中选择产生冗余数据的方法，以及在驱动器中产生的方法和差异方法，这两者都被执行以在盘驱动器上生成冗余数据。

    Layout designing method and layout designing apparatus
    24.
    发明授权
    Layout designing method and layout designing apparatus 失效
    布局设计方法及布图设计

    公开(公告)号：US6154873A

    公开(公告)日：2000-11-28

    申请号：US92090

    申请日：1998-06-05

    申请人： Naoya Takahashi

    发明人： Naoya Takahashi

    IPC分类号： H01L21/82 ,  G06F17/50

    CPC分类号： G06F17/5068

    摘要： A hierarchical layout designing method for an LSI has the step of determining the layout positions and shapes of hard macro blocks and a soft macro block, the step of forming a wiring which connects the hard macro blocks to each other and a path which passes above the soft macro block, the step of evaluating the influence which a wiring passing above the soft macro block will influence on the internal wiring of the soft macro block, a determination step of determining the extending direction in which the cell rows are to extend in the soft macro block, the step of forming in the soft macro block the cell rows in which cells are to be placed, and the step of calculating a first cost "COST x" in the case where the cell rows are formed extending in an x-axial direction and a second cost "COST y" in the case where the cell rows are formed extending in any-axial direction. By the determination step, the first cost "COST x" and the second cost "COST y" are compared with each other, and a direction in which the lower one of the first and second costs is attained is determined as the extending direction of the cell rows.

    摘要翻译： LSI的层次布局设计方法具有确定硬宏块和软宏块的布局位置和形状的步骤，形成将硬宏块彼此连接的布线和通过上述 软宏块，评估通过软宏块以上的布线对影响软宏块的内部布线的影响的步骤，确定单元行在软件中延伸的延伸方向的确定步骤 宏块，在软宏块中形成要在其中放置单元的单元行的步骤，以及在形成单元行的情况下计算第一代价“COST x”的步骤，x轴 方向，并且在形成在任何轴向方向上形成电池列的情况下的第二次成本“COST y”。 通过确定步骤，将第一成本“COST x”和第二成本“COST y”彼此进行比较，并且确定获得第一和第二成本的较低者的方向作为 单元格行。

    Vehicle load measuring apparatus
    25.
    发明授权
    Vehicle load measuring apparatus 失效
    车载测量装置

    公开(公告)号：US6122979A

    公开(公告)日：2000-09-26

    申请号：US71899

    申请日：1998-05-05

    申请人： Masaya Tsuchie ,  Naoya Takahashi

    发明人： Masaya Tsuchie ,  Naoya Takahashi

    IPC分类号： B60P5/00 ,  G01G19/12 ,  G01L1/12 ,  G01L1/04

    CPC分类号： G01G19/12

    摘要： When there is a difference in characteristic between sensing devices received respectively in receiving portions disposed at the opposite ends of a shackle pin and, therefore, the voltage of a load signal obtained from the sensing device in the receiving portion side is higher than the voltage of a load signal obtained from the sensing device in the receiving portion side because of the above-mentioned difference even if the loads imposed on the receiving portions respectively are equal to each other, configuration is made so that a correction resistor is parallelly connected to a detection winding of the sensing device in the receiving portion side. Accordingly, a part of the induced current flowing between opposite ends of the detection winding also flow in the correction resistor, so that a voltage drop occurs in the correction resistor. By this voltage drop, the voltage of the load signal obtained from the sensing device in the receiving portion side is made coincident with the voltage of the load signal obtained from the sensing device in the receiving portion side.

    摘要翻译： 当分别在设置在钩扣销的相对端的接收部分中接收到的感测装置之间的特性差异，并且因此从接收部分侧的感测装置获得的负载信号的电压高于 即使施加在接收部分上的负载分别相等，由于上述差异，从接收部分侧的感测装置获得的负载信号被构造成使得校正电阻器并联连接到检测 感测装置在接收部分侧的卷绕。 因此，在检测绕组的两端之间流动的感应电流的一部分也流入校正电阻器，从而在校正电阻器中产生电压降。 通过该电压降，从接收部分侧的感测装置获得的负载信号的电压与从接收部分侧的感测装置获得的负载信号的电压一致。

    Structure for mounting sensing devices for measuring a vehicle load
    27.
    发明授权
    Structure for mounting sensing devices for measuring a vehicle load 失效
    用于安装用于测量车辆负载的感测装置的结构

    公开(公告)号：US5892181A

    公开(公告)日：1999-04-06

    申请号：US836952

    申请日：1997-09-18

    申请人： Naoya Takahashi

    发明人： Naoya Takahashi

    IPC分类号： G01G19/12 ,  G01G19/08 ,  G01L1/12 ,  G01G19/02

    CPC分类号： G01G19/08 ,  Y10S177/09

    摘要： A structure for mounting sensing devices for measuring a vehicle load which allows the sensing device to obtain a detection value according to the actual load without being affected by the loading condition of baggage on the rear body, the inclination condition of the road, the steering condition of a handwheel, and the like. In a structure for mounting sensing devices 7 for measuring a load on an axle member 5 in which a load G of the vehicle is dispersedly imposed on both ends, recessed housing portions 5f and 5g are formed along the axial direction of the axle member 5 in both end portions 5a and 5b of the axle member 5, respectively. The sensing devices 7 are housed, mounted, and fixed in the recessed housing portions 5f and 5g, while the directions of the sensing devices 7 in a circumferential direction and a radial direction of the axle member 5 are made coincident with each other.

    摘要翻译： PCT No.PCT / JP96 / 01374 Sec。 371日期：1997年9月18日 102（e）1997年9月18日PCT PCT 1996年5月23日PCT公布。 WO96 / 37760 PCT公开号 日期：1996年11月28日用于安装用于测量车辆负载的感测装置的结构，其允许感测装置根据实际负载获得检测值而不受后身上的行李的装载状况的影响， 道路，手轮的转向状况等。 在安装用于测量车辆的负载G分散施加在两端的轴构件5上的负载的检测装置7的结构中，沿轴构件5的轴向方向形成有凹部收纳部5f，5g， 轴构件5的两端部5a和5b分别是两端。 感测装置7容纳，安装和固定在凹入的壳体部分5f和5g中，同时感测装置7的轴向方向和轴构件5的径向方向彼此一致。

    Semiconductor disk storage
    28.
    发明授权
    Semiconductor disk storage 失效
    半导体磁盘存储

    公开(公告)号：US5606529A

    公开(公告)日：1997-02-25

    申请号：US612618

    申请日：1996-03-06

    申请人： Hisao Honma ,  Kazuo Nakagoshi ,  Naoya Takahashi ,  Makoto Kogai ,  Kenichi Takamoto

    发明人： Hisao Honma ,  Kazuo Nakagoshi ,  Naoya Takahashi ,  Makoto Kogai ,  Kenichi Takamoto

    IPC分类号： G06F3/06 ,  G06F12/08 ,  G11C13/00

    CPC分类号： G06F3/0601 ,  G06F12/0866 ,  G06F2003/0694 ,  G06F2212/2022 ,  G06F2212/312

    摘要： A semiconductor storage device transfers data with an information processing device and includes a non-volatile semiconductor memory in which data is electrically re-writable, a volatile semiconductor memory connected to the non-volatile memory and temporarily storing data of the non-volatile semiconductor memory, and a CPU connected to the volatile semiconductor memory and the non-volatile semiconductor memory. The CPU controls the transfer of data among the non-volatile memory, the volatile memory and the CPU. The CPU also transfers data with the information processing device in accordance with a fixed-length form for data. When an access from the CPU to the volatile semiconductor makes a miss hit (i.e., misses), the CPU accesses the non-volatile semiconductor memory. When a failure is generated in the non-volatile semiconductor memory or when a predicted service life of the non-volatile semiconductor memory is elapsed, the non-volatile semiconductor memory can be substituted by an alternate memory.

    摘要翻译： 半导体存储装置与信息处理装置传送数据，并且包括数据可重写的非易失性半导体存储器，与非易失性存储器连接的易失性半导体存储器，并临时存储非易失性半导体存储器的数据 连接到易失性半导体存储器和非易失性半导体存储器的CPU。 CPU控制非易失性存储器，易失性存储器和CPU之间的数据传输。 CPU还根据数据的固定长度形式与信息处理设备传输数据。 当从CPU到易失性半导体的访问造成未命中（即错过）时，CPU访问非易失性半导体存储器。 当在非易失性半导体存储器中产生故障时，或者当经过非易失性半导体存储器的预计使用寿命时，非易失性半导体存储器可以被备用存储器代替。

    Integrated circuit and layout system therefor
    29.
    发明授权
    Integrated circuit and layout system therefor 失效
    集成电路及布局系统

    公开(公告)号：US5331572A

    公开(公告)日：1994-07-19

    申请号：US871287

    申请日：1992-04-20

    申请人： Naoya Takahashi

    发明人： Naoya Takahashi

    IPC分类号： H01L21/82 ,  G06F17/50 ,  H01L27/02 ,  G06F15/60

    CPC分类号： H01L27/0207 ,  G06F17/5068

    摘要： In the chip layout of an LSI, a layout near bonding pads is efficiently optimized. Especially in a chip having a large number of pins, an increase in chip size caused by pad necks can be prevented. Normal functional macro-blocks are arranged in an inner region of the LSI. On the other hand, input/output blocks including corner blocks are arranged at the peripheral portion of the LSI. In addition, pads separated from the input/output blocks are arranged on the LSI including portions near the corner blocks, and the input/output blocks and the pads are connected to each other through wiring lines.

    摘要翻译： 在LSI的芯片布局中，接近焊盘附近的布局被有效地优化。 特别是在具有大量引脚的芯片中，可以防止由焊盘颈部引起的芯片尺寸的增加。 正常功能宏块被布置在LSI的内部区域中。 另一方面，包括角块的输入/输出块布置在LSI的周边部分。 此外，从输入/输出块分离的焊盘被布置在LSI上，包括靠近拐角块的部分，并且输入/输出块和焊盘通过布线相互连接。