公开(公告)号：US11044491B2

公开(公告)日：2021-06-22

申请号：US16942601

申请日：2020-07-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N11/02 ,  H04N19/52 ,  H04N19/119 ,  H04N19/176

Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition using a first motion vector for the partition, (ii) a second motion vector for the partition using the first prediction image, and (iii) a second prediction image for the partition as the prediction image using the second motion vector. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image using the first motion vector, without using the second motion vector.

公开(公告)号：US11044476B2

公开(公告)日：2021-06-22

申请号：US17087128

申请日：2020-11-02

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Sughosh Pavan Shashidhar ,  Ru Ling Liao ,  Hai Wei Sun ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/96 ,  H04N19/176 ,  H04N19/119 ,  H04N19/157

Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.

公开(公告)号：US12289462B2

公开(公告)日：2025-04-29

申请号：US17642448

申请日：2020-12-21

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Han Boon Teo ,  Hai Wei Sun ,  Jing Ya Li ,  Che Wei Kuo ,  Chong Soon Lim ,  Chu Tong Wang ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/00 ,  H04N19/105 ,  H04N19/176 ,  H04N19/46 ,  H04N19/80

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry writes, into a bitstream, a first flag indicating whether or not to enable a first process of applying a filter to a first image to generate a second image, holding the second image as a reference image, and displaying the second image. When the first process is not enabled, circuitry writes, into the bitstream, one or more parameters for controlling a second process of applying the filter to the first image to generate the second image, holding the first image as a reference image, and displaying the second image.

公开(公告)号：US12273522B2

公开(公告)日：2025-04-08

申请号：US18111106

申请日：2023-02-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Hai Wei Sun ,  Jing Ya Li ,  Han Boon Teo ,  Ru Ling Liao ,  Che Wei Kuo ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe

IPC: H04N19/13 ,  H04N19/176

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation, determines whether a first block is available and whether a second block is available, the first block and the second block being defined relative to a current block to be processed; selects a context model based on whether the first block is available, whether the second block is available, which of inter prediction and intra prediction is to be applied to the first block, and which of inter prediction and intra prediction is to be applied to the second block; and encodes, using the context model selected, a parameter indicating which of intra prediction and inter prediction is to be applied to the current block.

公开(公告)号：US12262049B2

公开(公告)日：2025-03-25

申请号：US18545682

申请日：2023-12-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N11/02 ,  H04N19/119 ,  H04N19/176 ,  H04N19/52

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.

公开(公告)号：US12262004B2

公开(公告)日：2025-03-25

申请号：US17582950

申请日：2022-01-24

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Che-Wei Kuo ,  Chong Soon Lim ,  Jing Ya Li ,  Han Boon Teo ,  Hai Wei Sun ,  Chu Tong Wang ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/117 ,  H04N19/132 ,  H04N19/159 ,  H04N19/176 ,  H04N19/186 ,  H04N19/82

Abstract: An encoder includes circuitry which generates a first coefficient value by applying a CCALF process to a first reconstructed image sample of a luma component; generates a second coefficient value by applying an ALF process to a second reconstructed image sample of a chroma component; generates a third coefficient value by adding the first coefficient value to the second coefficient value; and encodes a third reconstructed image sample of the chroma component using the third coefficient value. The circuitry writes a first parameter into a sequence parameter set; writes a second parameter into a parameter set of a picture in response to a value of the first parameter being 1; writes a third parameter into a slice header in response to the value of the first parameter being 1; and writes a fourth parameter into a coding tree unit in response to a value of the third parameter being 1.

公开(公告)号：US12219155B2

公开(公告)日：2025-02-04

申请号：US18591350

申请日：2024-02-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/159 ,  H04N19/119 ,  H04N19/139 ,  H04N19/513

Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.

公开(公告)号：US12206906B2

公开(公告)日：2025-01-21

申请号：US18484292

申请日：2023-10-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Hai Wei Sun ,  Han Boon Teo ,  Jing Ya Li ,  Che-Wei Kuo ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/82 ,  H04N19/119 ,  H04N19/176 ,  H04N19/593

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry determines whether to split a current luma virtual pipeline decoding unit (VPDU) into smaller blocks. When it is determined not to split the current luma VPDU into smaller blocks, the circuitry predicts a block of chroma samples without using luma samples. When it is determined to split the luma VPDU into smaller blocks, the circuitry predicts the block of chroma samples using luma samples. The circuitry encodes the block using the predicted chroma samples.

公开(公告)号：US12200270B2

公开(公告)日：2025-01-14

申请号：US17589419

申请日：2022-01-31

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Han Boon Teo ,  Hai Wei Sun ,  Che-Wei Kuo ,  Chu Tong Wang ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/82 ,  H04N19/105 ,  H04N19/109 ,  H04N19/11 ,  H04N19/117 ,  H04N19/119 ,  H04N19/12 ,  H04N19/124 ,  H04N19/13 ,  H04N19/132 ,  H04N19/157 ,  H04N19/172 ,  H04N19/176 ,  H04N19/18 ,  H04N19/186 ,  H04N19/61

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component, and generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry modifies the first coefficient value by performing an arithmetic right shift by 7 bits on the first coefficient value. The circuitry generates a third coefficient value by adding the modified first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value.

公开(公告)号：US12192500B2

公开(公告)日：2025-01-07

申请号：US18355164

申请日：2023-07-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/44 ,  H04N19/105 ,  H04N19/139 ,  H04N19/176 ,  H04N19/513

Abstract: An image encoder includes circuitry and a memory, wherein the circuitry, in operation, determines whether inter prediction is to be applied to a current block; in response to determining that the inter prediction is to be applied to the current block, performs a partition prediction process; and, in response to determining that the inter prediction is not to be applied, encodes the current block without using the partition prediction process. The partition prediction process includes predicting first values of a set of pixels between a first partition and a second partition in the current block, using a first motion vector for the first partition; predicting second values of the set of pixels, using a second motion vector for the second partition; weighting the first values and the second values; and generating a prediction image for the current block using the weighted first values and the weighted second values.