公开(公告)号：US20180190777A1

公开(公告)日：2018-07-05

申请号：US15415995

申请日：2017-01-26

Applicant: Texas Instruments Incorporated

Inventor： Hiroyuki Tomomatsu ,  Sameer Pendharkar ,  Hiroshi Yamasaki

IPC: H01L29/40 ,  H01L29/778 ,  H01L29/423 ,  H01L29/20

CPC classification number: H01L29/404 ,  H01L29/2003 ,  H01L29/4238 ,  H01L29/7786

Abstract: A transistor device includes a field plate that extends from a source runner layer and/or a source contact layer. The field plate can be coplanar with and/or below a gate runner layer. The gate runner layer is routed away from a region directly above the gate metal layer by a gate bridge, such that the field plate can extend directly above the gate metal layer without being interfered by the gate runner layer. Coplanar with the source runner layer or the source contact layer, the field plate is positioned close to the channel region, which helps reduce its parasitic capacitance. By vertically overlapping the metal gate layer and the field plate, the disclosed HEMT device may achieve significant size efficiency without additional routings.