Terminal
    25.
    发明授权
    Terminal 有权
    终奌站

    公开(公告)号:US06353863B1

    公开(公告)日:2002-03-05

    申请号:US09051286

    申请日:1998-12-01

    IPC分类号: G06F300

    摘要: A low cost, a low power consumption and a small size are three very important factors for a mobile communication terminal. A great problem is posed by the conventional technique using a DSP and a CPU independent of each other which requires two external memory systems. Also, two peripheral units are required for data input and output of the DSP and CPU. As a result, an extraneous communication overhead occurs between the DSP and the CPU. The invention realizes a mobile communication terminal system by a DSP/CPU integrated chip comprising a DSP/CPU core (500) integrated as a single bus master, an integrated external bus interface (606) and an integrated peripheral circuit interface. The memory systems and the peripheral circuits of the DSP and the CPU can thus be integrated to realize a mobile communication terminal system low in cost and power consumption and small in size.

    摘要翻译: 低成本,低功耗和小尺寸是移动通信终端的三个非常重要的因素。 使用DSP和独立于彼此的CPU的传统技术提出了一个很大的问题,需要两个外部存储器系统。 此外,DSP和CPU的数据输入和输出需要两个外设单元。 因此,DSP和CPU之间会发生无关的通信开销。 本发明通过DSP / CPU集成芯片实现移动通信终端系统,其包括集成为单总线主机的DSP / CPU核心(500),集成外部总线接口(606)和集成外围电路接口。 因此,DSP和CPU的存储器系统和外围电路可以被集成以实现低成本和功耗以及体积小的移动通信终端系统。

    Instruction preprocessor for conditionally combining short memory
instructions into virtual long instructions
    26.
    发明授权
    Instruction preprocessor for conditionally combining short memory instructions into virtual long instructions 失效
    指令预处理程序用于将短暂的记忆指令组合成虚拟长的指令

    公开(公告)号:US5163139A

    公开(公告)日:1992-11-10

    申请号:US575140

    申请日:1990-08-29

    IPC分类号: G06F9/38

    CPC分类号: G06F9/3889 G06F9/3885

    摘要: An instruction memory apparatus for a data processing unit stores a sequence of instructions. At each instruction fetch cycle, two sequentially adjacent instructions are accessed. An instruction preprocessing unit, coupled to the internal instruction memory, combines the two sequentially adjacent instructions into a single long instruction word when the two instructions meet predefined criteria for being combined. The first of the two instructions is combined with a no-operation instruction to generate a long instruction word when the predefined criteria are not met. In that case, the second instruction [may be accessed again] is used during the next instruction fetch cycle as the first of the two sequentially adjacent instructions to be processed during that next instruction fetch cycle.

    Customized personal terminal device
    27.
    发明授权
    Customized personal terminal device 失效
    定制个人终端设备

    公开(公告)号:US5163111A

    公开(公告)日:1992-11-10

    申请号:US567010

    申请日:1990-08-14

    摘要: There is provided a customized personal terminal device capable of operating in response to input data peculiar to the operator, comprising a speech recognition unit for recognizing inputted speech, an image recognition unit for recognizing inputted image, and an instruction recognition unit for recognizing an inputted instruction. Neural networks are provided in at least two of the speech, image and instruction recognition units, a bus operatively connected to the respective recognition units, a processor operatively connected to the bus to perform processing upon the speech, and image and instruction recognized by the recognition units. Also, memory is operatively connected to the bus, and a control unit exercises control over information exchange between respective recognition units and the memory under the control of the processor.

    摘要翻译: 提供了能够响应于操作者特有的输入数据而操作的定制个人终端装置,包括用于识别输入的语音的语音识别单元,用于识别输入的图像的图像识别单元,以及用于识别输入的指令的指令识别单元 。 神经网络提供在语音,图像和指令识别单元中的至少两个中,可操作地连接到各个识别单元的总线,可操作地连接到总线以对语音执行处理的处理器,以及通过识别识别的图像和指令 单位。 此外,存储器可操作地连接到总线,并且控制单元在处理器的控制下对各个识别单元和存储器之间的信息交换进行控制。

    Terminal apparatus
    30.
    发明申请
    Terminal apparatus 审中-公开

    公开(公告)号:US20060085563A1

    公开(公告)日:2006-04-20

    申请号:US11289389

    申请日:2005-11-30

    IPC分类号: G06F3/00

    摘要: A low cost, a low power consumption and a small size are three very important factors for a mobile communication terminal. A great problem is posed by the conventional technique using a DSP and a CPU independent of each other which requires two external memory systems. Also, two peripheral units are required for data input and output of the DSP and CPU. As a result, an extraneous communication overhead occurs between the DSP and the CPU. The invention realizes a mobile communication terminal system by a DSP/CPU integrated chip comprising a DSP/CPU core (500) integrated as a single bus master, an integrated external bus interface (606) and an integrated peripheral circuit interface. The memory systems and the peripheral circuits of the DSP and the CPU can thus be integrated to realize a mobile communication terminal system low in cost and power consumption and small in size.