公开(公告)号：US06639299B2

公开(公告)日：2003-10-28

申请号：US10118403

申请日：2002-04-08

申请人： Yutaka Aoki

发明人： Yutaka Aoki

IPC分类号： H01L2900

CPC分类号： H01L24/17 ,  H01L21/56 ,  H01L23/3114 ,  H01L23/5222 ,  H01L23/5227 ,  H01L24/14 ,  H01L2223/6677 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/30107 ,  Y10S438/957 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2224/05124

摘要： A semiconductor device includes a semiconductor substrate on which a circuit element forming region and a plurality of connection pads are formed, a first columnar electrode which is formed on a first connection pad so as to be electrically connected to the first connection pad, a first conductive layer which is formed on a second connection pad so as to be electrically connected to the second connection pad, an encapsulating film which is formed at least around the first columnar electrode, on the semiconductor substrate and on the first conductive layer, and a second conductive layer which is formed on the encapsulating film so as to face the first conductive layer. A passive element is formed from the first and second conductive layers.

摘要翻译： 一种半导体器件包括其上形成有电路元件形成区域和多个连接焊盘的半导体衬底，形成在第一连接焊盘上以与第一连接焊盘电连接的第一柱状电极，第一导电 层，其形成在第二连接焊盘上，以便电连接到第二连接焊盘，形成在至少围绕第一柱状电极的半导体衬底上和第一导电层上的封装膜，以及第二导电层 层，其形成在封装膜上以面对第一导电层。 无源元件由第一和第二导电层形成。

公开(公告)号：US06501169B1

公开(公告)日：2002-12-31

申请号：US09708379

申请日：2000-11-08

申请人： Yutaka Aoki ,  Hiroshi Takenaka ,  Ichiro Mihara

发明人： Yutaka Aoki ,  Hiroshi Takenaka ,  Ichiro Mihara

IPC分类号： H01L2312

CPC分类号： H01L21/76885 ,  H01L23/5225 ,  H01L23/552 ,  H01L23/585 ,  H01L23/66 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2924/013

摘要： A semiconductor device of a CSP structure is obtained by forming projection electrodes on a plurality of circuit element forming areas of a semiconductor wafer substrate, and then dividing the wafer into chips. Wiring patterns connected to connection pads for signal transmission are provided on the upper surface of an insulating film formed on the circuit element forming areas, and a conductive layer connected to a connection pad connected to a ground potential is provided on the resultant structure except for on the wiring patterns and on areas near the wiring patterns. Further, a thin film circuit element may be provided at the same layer as the conductive layer or below the conductive layer.

摘要翻译： 通过在半导体晶片基板的多个电路元件形成区域上形成投影电极，然后将晶片分割成芯片来获得CSP结构的半导体器件。 在形成在电路元件形成区域上的绝缘膜的上表面上设置有连接到信号传输用连接焊盘的布线图案，并且，在除了在 布线图案和布线图案附近的区域。 此外，薄膜电路元件可以设置在与导电层相同的层或者在导电层的下方。

公开(公告)号：US06153921A

公开(公告)日：2000-11-28

申请号：US434283

申请日：1999-11-05

申请人： Yutaka Aoki ,  Takashi Ishikawa ,  Haruhiko Taguchi ,  Takeshi Kasahara

发明人： Yutaka Aoki ,  Takashi Ishikawa ,  Haruhiko Taguchi ,  Takeshi Kasahara

IPC分类号： H01L21/60 ,  H01L29/861 ,  H01L29/93 ,  H01L31/02 ,  H01L31/0224 ,  H01L31/105 ,  H01L31/075

CPC分类号： H01L31/02005 ,  H01L24/05 ,  H01L24/06 ,  H01L31/022408 ,  H01L31/105 ,  H01L2224/04042 ,  H01L2224/05 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/01004 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12034 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/14

摘要： Disclosed is a diode device in which two electrodes of regions forming both terminals are provided on the same face, thereby enabling the device to be connected to a circuit substrate by face-down bonding. Since a region is located within the semiconductor base, an electrode cannot be connected at the top face thereof; to overcome this, a groove is provided extending in a perpendicular direction from the top face of the semiconductor base to the region, and an electrode is provided in the groove. Then, the electrode in the groove is exposed at the top face, enabling the electrodes of both regions to be connected at the top face.

摘要翻译： 公开了一种二极管器件，其中形成两个端子的区域的两个电极设置在同一个面上，从而使得器件能够通过面朝下的接合连接到电路衬底。 由于区域位于半导体基底内，电极不能在其顶面连接; 为了克服这一点，提供了从半导体基底的顶面到该区域在垂直方向上延伸的凹槽，并且在凹槽中设置电极。 然后，凹槽中的电极在顶面露出，使得两个区域的电极能够在顶面连接。

公开(公告)号：US08717253B2

公开(公告)日：2014-05-06

申请号：US13127782

申请日：2010-03-04

申请人： Yutaka Aoki ,  Kazuhiko Honjo ,  Akira Saitou

发明人： Yutaka Aoki ,  Kazuhiko Honjo ,  Akira Saitou

IPC分类号： H01Q15/02

CPC分类号： H01Q3/44 ,  H01Q25/00

摘要： A miniature variable-beam microwave antenna (1) comprises antenna conductors (100a, 100b), an EBG conductor (120), a variable reactance element (130), and an adjusting part (150). The EBG conductor (120) is connected to a grounded part (160) through the variable reactance element (130). The adjusting part (150) changes the apparent reactance of the EBG conductor (120) by changing the capacity of the variable reactance element (130). As the apparent reactance of the EBG conductor (120) changes, the directivity of the miniature variable-beam microwave antenna (1) also changes.

摘要翻译： 微型可变光束微波天线（1）包括天线导体（100a，100b），EBG导体（120），可变电抗元件（130）和调节部分（150）。 EBG导体（120）通过可变电抗元件（130）连接到接地部分（160）。 调整部件（150）通过改变可变电抗元件（130）的容量来改变EBG导体（120）的表面电抗。 随着EBG导体（120）的明显电抗变化，微型可变波束微波天线（1）的方向性也发生变化。

公开(公告)号：US20130337202A1

公开(公告)日：2013-12-19

申请号：US13979422

申请日：2012-01-16

申请人： Yutaka Aoki ,  Atsushi Takei ,  Yasushi Hirokawa ,  Yusuke Masuda

发明人： Yutaka Aoki ,  Atsushi Takei ,  Yasushi Hirokawa ,  Yusuke Masuda

IPC分类号： H01L21/673

CPC分类号： H01L21/673 ,  B32B27/08 ,  B32B27/302 ,  B32B2250/24 ,  B32B2270/00 ,  B32B2439/00 ,  B32B2553/00 ,  B65D2585/86 ,  C08L53/02 ,  C08L2205/02 ,  H01L21/67336 ,  Y10T428/1352 ,  Y10T428/24975 ,  C08L25/06

摘要： Disclosed are a multilayer styrenic resin sheet including 10 to 50 laminated layers which are each made of a styrenic resin composition that includes 29 to 65 mass % of a styrene/conjugated diene copolymer (A), 51 to 15 mass % of a polystyrene resin (B) and 20 to 9 mass % of an impact-resistant polystyrene resin (C) and which each have an average thickness of 2 to 50 μm; and a packaging material (such as carrier tape or tray) for electronic components which is formed from the multilayer styrenic resin sheet. The melt tension of the styrenic resin composition at 220° C. is preferably 10 to 30 mN, and the content of the conjugated diene is preferably 10 to 25 mass % relative to 100 mass % of the copolymer (A).

摘要翻译： 公开了一种多层苯乙烯树脂片，其包含10〜50层叠层，各层由苯乙烯系树脂组合物，苯乙烯/共轭二烯共聚物（A）29〜65质量％，聚苯乙烯树脂（质量％ B）和20〜9质量％的耐冲击性聚苯乙烯树脂（C），平均厚度为2〜50μm; 以及由多层苯乙烯树脂片形成的用于电子部件的包装材料（例如载带或托盘）。 苯乙烯树脂组合物在220℃下的熔融张力优选为10〜30mN，相对于共聚物（A）的100质量％，共轭二烯的含量优选为10〜25质量％。

公开(公告)号：US20090102700A1

公开(公告)日：2009-04-23

申请号：US12254314

申请日：2008-10-20

申请人： Yusuke KATO ,  Yutaka Aoki

发明人： Yusuke KATO ,  Yutaka Aoki

IPC分类号： G01S7/40

CPC分类号： G01S7/4008 ,  G01S13/931 ,  G01S2013/9375 ,  G01S2013/9389

摘要： In a power-loss reducing system, a transmitting unit causes a radar to transmit a measurement radio wave, and a power monitoring unit monitors power of the measurement radio wave transmitted from the radar through a cover while changing a positional relationship between the cover and the radar. An extracting unit extracts a value of the changed positional relationship between the cover and the radar based on a result of the monitoring of the power such that the extracted value of the positional relationship allows reduction of power loss of a radar wave transmitted, through the cover, from the radar located based on the extracted value of the positional relationship.

摘要翻译： 在功率损耗降低系统中，发送单元使雷达发送测量无线电波，并且功率监视单元通过盖监视从雷达发送的测量无线电波的功率，同时改变盖和 雷达。 提取单元基于监视功率的结果，提取盖和雷达之间的改变的位置关系的值，使得提取的位置关系的值允许通过盖子减少发送的雷达波的功率损耗 ，从位于雷达位置的提取值的位置关系。

公开(公告)号：US20070267659A1

公开(公告)日：2007-11-22

申请号：US11804160

申请日：2007-05-17

申请人： Yutaka Aoki

发明人： Yutaka Aoki

IPC分类号： H01L27/10

CPC分类号： H01L27/016 ,  H01L23/3114 ,  H01L23/5227 ,  H01L2924/0002 ,  H01L2924/00

摘要： A chip-type electronic component includes a substrate, a common potential layer formed on an upper side of the substrate, an insulating film formed on the common potential layer, and provided to expose at least part of the common potential layer. At least one common potential electrode is provided on the exposed part of the common potential layer, and a plurality of conductors provided on the insulating film, each of the conductors forming a part of a thin-film circuit element. At least one columnar electrode is electrically connected to at least one of the conductors, and a sealing film is formed around the columnar electrode.

摘要翻译： 芯片型电子部件包括基板，形成在基板的上侧的公共电位层，形成在公共电位层上的绝缘膜，用于露出共同电位层的至少一部分。 在公共电位层的暴露部分上设置至少一个公共电位电极，以及设置在绝缘膜上的多个导体，每个导体形成薄膜电路元件的一部分。 至少一个柱状电极与至少一个导体电连接，并且在柱状电极周围形成密封膜。

公开(公告)号：US07245264B2

公开(公告)日：2007-07-17

申请号：US11393035

申请日：2006-03-30

申请人： Kunio Sakakibara ,  Yutaka Aoki

发明人： Kunio Sakakibara ,  Yutaka Aoki

IPC分类号： H01Q13/00

CPC分类号： H01Q13/0225 ,  H01Q21/064

摘要： A high frequency module for converting a high frequency wave in a free space to a high frequency wave in a planar waveguide includes two metal plates, a dielectric substrate and a planar waveguide disposed on the dielectric substrate. The dielectric substrate between the two metal plates has the planar waveguide disposed thereon, and the planar waveguide protrudes either in a through hole bored in one of the two metal plates, or in a hollow space defined by the other of the two metal plates on the dielectric substrate.

摘要翻译： 用于将平面波导中的自由空间中的高频波转换为高频波的高频模块包括设置在电介质基板上的两个金属板，电介质基板和平面波导。 两个金属板之间的电介质基板具有设置在其上的平面波导，并且平面波导在两个金属板之一中钻孔的通孔中或者在两​​个金属板中的另一个中限定的中空空间中突出 电介质基片。

公开(公告)号：US06870256B2

公开(公告)日：2005-03-22

申请号：US10254222

申请日：2002-09-25

申请人： Yutaka Aoki ,  Ichiro Mihara ,  Takeshi Wakabayashi ,  Katsumi Watanabe

发明人： Yutaka Aoki ,  Ichiro Mihara ,  Takeshi Wakabayashi ,  Katsumi Watanabe

IPC分类号： H01L21/3205 ,  H01L20060101 ,  H01L21/60 ,  H01L21/822 ,  H01L23/50 ,  H01L23/52 ,  H01L23/522 ,  H01L27/00 ,  H01L27/04 ,  H01L29/40 ,  H01L31/00

CPC分类号： H01L23/3114 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/525 ,  H01L2924/0002 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/00

摘要： In a semiconductor device, re-wiring is provided on a circuit element formation region of a semiconductor substrate. A columnar electrode for connection with a circuit board is provided on the rewiring. A first insulating film is provided over the semiconductor substrate excluding a connection pad, and a ground potential layer connected to a ground potential is provided on an upper surface of the first insulating film. A re-wiring is provided over the ground potential layer with a second insulating film interposed. The ground potential layer serves as a barrier layer for preventing crosstalk between the re-wiring and circuit element formation region. A thin-film circuit element is provided on the second insulating film, and a second ground potential layer is provided as a second barrier layer over the thin-film circuit element with an insulating film interposed. Re-wiring is provided over the second ground potential layer.

摘要翻译： 在半导体器件中，在半导体衬底的电路元件形成区域上设置再布线。 在重新布线时提供用于与电路板连接的柱状电极。 第一绝缘膜设置在除了连接焊盘之外的半导体衬底上，并且在第一绝缘膜的上表面上设置连接到接地电位的接地电位层。 在地电位层上提供再布线，其中插入有第二绝缘膜。 地电位层用作防止重新布线和电路元件形成区域之间的串扰的阻挡层。 薄膜电路元件设置在第二绝缘膜上，第二接地电位层设置在薄膜电路元件上，作为第二阻挡层，绝缘膜被插入。 在第二接地电位层上提供重新布线。

公开(公告)号：US06847066B2

公开(公告)日：2005-01-25

申请号：US09924293

申请日：2001-08-08

申请人： Iwao Tahara ,  Ichiro Mihara ,  Yutaka Aoki

发明人： Iwao Tahara ,  Ichiro Mihara ,  Yutaka Aoki

IPC分类号： H01L23/48 ,  H01L21/02 ,  H01L23/31 ,  H01L23/522 ,  H01L27/08 ,  H01L27/148 ,  H01L29/168

CPC分类号： H01L23/5227 ,  H01L23/3114 ,  H01L23/5223 ,  H01L27/08 ,  H01L27/0805 ,  H01L28/20 ,  H01L28/40 ,  H01L2924/0002 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/00

摘要： A thin film passive element includes at least one of a capacitance element having a plurality of conductive layers and a dielectric material layer and an inductance element formed of a patterned conductive layer is stacked on a circuit element-forming region of a semiconductor substrate provided with a plurality of connection pads and is connected to the circuit element of the circuit element-forming region.

摘要翻译： 薄膜无源元件包括具有多个导电层和电介质材料层的电容元件和由图案化导电层形成的电感元件中的至少一个层叠在设置有半导体层的半导体衬底的电路元件形成区域上 多个连接焊盘并连接到电路元件形成区域的电路元件。