Superconducting threshold logic circuit
    24.
    发明授权
    Superconducting threshold logic circuit 失效
    超导阈值逻辑电路

    公开(公告)号:US5111082A

    公开(公告)日:1992-05-05

    申请号:US551495

    申请日:1990-07-12

    申请人: Yutaka Harada

    发明人: Yutaka Harada

    摘要: A superconducting threshold logic circuit comprises current switching circuits each having a Josephson device. Bias currents of the switching circuits are varied independently to change weights for input signals. A sum of the weighted input signals are inputted to another current switching circuit having a Josephson device in order to compare the sum with a threshold.

    摘要翻译: 超导阈值逻辑电路包括各自具有约瑟夫逊器件的电流开关电路。 开关电路的偏置电流是独立变化的,以改变输入信号的权重。 将加权输入信号的总和输入到具有约瑟夫逊器件的另一个电流开关电路,以便将和与阈值进行比较。

    Superconducting circuit
    25.
    发明授权
    Superconducting circuit 失效
    超导电路

    公开(公告)号:US4902908A

    公开(公告)日:1990-02-20

    申请号:US146160

    申请日:1988-01-20

    申请人: Yutaka Harada

    发明人: Yutaka Harada

    IPC分类号: H03K19/195

    摘要: A superconducting circuit comprises a quantum flux parametron. In the superconducting circuit, at least one of two Josephson devices is a voltage controlled superconducting device, the critical current of which can be controlled by applying a voltage. By adjusting the applied voltage, the critical currents of the two Josephson devices can be equalized. If an input signal is used as the applied voltage, the input signal can be isolated from an output signal. And further, if both critical currents of the two Josephson devices are increased after an input signal is supplied, the input signal can be stably amplified.

    摘要翻译: 超导电路包括量子通量参数。 在超导电路中,两个约瑟夫逊器件中的至少一个是压控超导器件,其临界电流可以通过施加电压来控制。 通过调整施加的电压,两个约瑟夫逊器件的临界电流可以相等。 如果输入信号用作施加的电压,输入信号可以与输出信号隔离。 此外,如果在提供输入信号之后两个约瑟夫逊器件的两个临界电流都增加,则可以稳定地放大输入信号。

    Unidirectional single-flux-quantum logic circuit
    26.
    发明授权
    Unidirectional single-flux-quantum logic circuit 失效
    单向单通量量子逻辑电路

    公开(公告)号:US4678945A

    公开(公告)日:1987-07-07

    申请号:US701488

    申请日:1985-02-14

    IPC分类号: H03K19/195

    CPC分类号: H03K19/195 Y10S505/858

    摘要: A superconducting logic circuit has a first and a second one-junction SQUID's (superconducting quantum interference device) connected by a superconducting inductor, the junction of the second SQUID having a larger critical current than that of the first SQUID, the inductance of the second SQUID being smaller than that of the inductor, and a signal applied to the first SQUID is unidirectionally transmitted to the second SQUID by applying bias currents to the junctions of the two SQUID's.

    摘要翻译: 超导逻辑电路具有由超导电感器连接的第一和第二单结SQUID(超导量子干涉装置),第二SQUID的结与第一SQUID的电流相比具有更大的临界电流,第二SQUID的电感 小于电感器的信号,并且施加到第一SQUID的信号通过将偏置电流施加到两个SQUID的结点而单向地传输到第二SQUID。

    Direct coupled nonlinear injection Josephson logic circuits
    27.
    发明授权
    Direct coupled nonlinear injection Josephson logic circuits 失效
    直接耦合非线性注入约瑟夫森逻辑电路

    公开(公告)号:US4313066A

    公开(公告)日:1982-01-26

    申请号:US68299

    申请日:1979-08-20

    摘要: Direct coupled, nonlinear injection logic circuits having high gain, good isolation between input and output, the capability of parallel fan-in and fan-out, and which do not require a large area. These circuits are comprised of a first stage that isolates the input from the output and other stages which can be used for additional gain, or for building logic circits, such as AND, and DOT-OR. The first stage isolation is a parallel network comprised of two circuits, each circuit of which includes a series connection of resistor-Josephson tunnelling device. A gate current I.sub.g flows through each Josephson device when the devices are in their zero voltage states. An input current I.sub.c is injected into one of the parallel circuits while an output is taken from the other parallel circuit. When an input current is injected, one of the Josephson devices is switched to the nonzero voltage state, which then causes a greater amount of gate current I.sub.g to be switched to the other Josephson device, thereby also switching it to the nonzero voltage state. The gate current is then delivered to a load, or used as an input to other stages of a logic circuit. Complete isolation between input and output is achieved by the two Josephson devices in their nonzero voltage states.

    摘要翻译: 直接耦合的非线性注入逻辑电路具有高增益,输入和输出之间的良好隔离,并行扇入和扇出的能力,并且不需要大面积。 这些电路包括第一级,其将来自输出的输入和可用于额外增益的其他级隔离,或用于构建逻辑电路,例如AND和DOT-OR。 第一级隔离是由两个电路组成的并联网络,每个电路的每个电路包括电阻约瑟夫逊隧道装置的串联连接。 当器件处于零电压状态时,栅极电流Ig流过每个约瑟夫逊器件。 输入电流Ic被注入到一个并联电路中,而从其他并联电路获取输出。 当注入输入电流时,约瑟夫逊器件中的一个器件被切换到非零电压状态,这样就会使更大量的栅极电流Ig被切换到另一个约瑟夫逊器件,从而也将其切换到非零电压状态。 然后将栅极电流传送到负载,或者用作逻辑电路的其他级的输入。 输入和输出之间的完全隔离由两个约瑟夫逊器件处于非零电压状态来实现。

    Josephson junction logic element
    28.
    发明授权
    Josephson junction logic element 失效
    约瑟夫逊结逻辑元件

    公开(公告)号:US4012642A

    公开(公告)日:1977-03-15

    申请号:US585160

    申请日:1975-06-09

    摘要: Logic elements comprising resettable Josephson junctions cooperating with matched transmission lines have input circuit inductances connected to reversible Josephson devices which are so small that a flux of less than one flux quantum only can be trapped therein preventing the continued circulation of supercurrent in the inductance after removal of the input signals from the associated reversible Josephson junctions.The resettable junctions are designed such that upon removal of the input or control field from the resettable Josephson junctions connected to the transmission line, the a.c. voltage which is generated across said junction, is larger than the time-average d.c. voltage across said junction when switched to its state of normal conductance so that, after removal of the input or control field from said junction, the d.c. voltage is caused to lock back to zero, thus resetting the element. Circuit parameters for achieving resettability without interrupting gate current are given. Logic circuits including AND, OR and NOT circuits are described and the conditions for the operation of such circuits which include both resettable and reversible Josephson devices are also given.

    摘要翻译: 包括与匹配传输线配合的可复位约瑟夫逊接头的逻辑元件具有连接到可逆约瑟夫逊器件的输入电路电感,其可变小到使得少于一个通量量程的通量仅能够被捕获在其中,从而防止除去后的电感中的超电流的继续循环 来自相关的可逆约瑟夫逊结的输入信号。

    Josephson device threshold gates
    29.
    发明授权
    Josephson device threshold gates 失效
    约瑟夫森器件阈值门

    公开(公告)号:US3868515A

    公开(公告)日:1975-02-25

    申请号:US31981172

    申请日:1972-12-29

    申请人: IBM

    发明人: LANDMAN BERNARD S

    CPC分类号: H03K19/1952 Y10S505/858

    摘要: Threshold logic gates are provided using Josephson devices to perform the weighting and threshold functions. The input currents are provided as control currents to vary the critical switching currents of respective series connected Josephson devices. A logic 1 input switches the associated Josephson device or devices from the V 0 state to the V Delta state. An alternate parallel path is provided. The alternate path carries a current which is effectively the sum of the weighted logic inputs. A further Josephson device is positioned to be influenced by the current in said alternate path whereby the further Josephson device switches from the V 0 state to the V Delta state when the threshold function is achieved.

    摘要翻译: 使用约瑟夫逊器件提供阈值逻辑门来执行加权和阈值函数。 输入电流被提供为控制电流,以改变各个串联的约瑟夫逊器件的关键开关电流。 逻辑1输入将相关联的约瑟夫逊器件或器件从V = 0状态切换到V = DELTA状态。 提供了一个交替的并行路径。 备用路径携带有效地加权逻辑输入之和的电流。 进一步的约瑟夫逊装置被定位成受到所述交替路径中的电流的影响,由此当实现阈值功能时,另外的约瑟夫逊装置从V = 0状态切换到V = DELTA状态。