Quadrature modulator carrier quadrature error detection method and quadrature modulation device
    21.
    发明申请
    Quadrature modulator carrier quadrature error detection method and quadrature modulation device 失效
    正交调制器载波正交误差检测方法和正交调制装置

    公开(公告)号:US20040250192A1

    公开(公告)日:2004-12-09

    申请号:US10482437

    申请日:2003-12-30

    发明人: Norio Kanazawa

    摘要: In a quadrature modulator which receives a pair of carrier signals having phases perpendicular to one another, and I and Q signals, and which outputs a modulating signal, a quadrature error based on a phase difference between the pair of carrier signals is detected. In a state that the signal levels of the I and Q signals are each made to be zero, a pair of dc voltages for causing that the modulating signal outputted from the quadrature modulator is made to be a predetermined reference level, are each added to the I and Q signals. In a state that pairs of dc voltages are each changed and sequentially added to the I and Q signals, plural combinations of pairs of dc voltages for causing that a signal level of the modulating signal is made to be the predetermined reference level, are retrieved, and the quadrature error is calculated from simultaneous equations in which respective values of the retrieved plural combinations of pairs of dc voltages, the signal level of the modulating signal, and a quadrature error of the carrier signals are variables.

    摘要翻译: 在正交调制器中,接收一对具有彼此垂直的相位的载波信号,以及I和Q信号,并且其输出调制信号,检测基于一对载波信号之间的相位差的正交误差。 在I和Q信号的信号电平分别为零的状态下,将用于使得从正交调制器输出的调制信号的一对直流电压设为预定的参考电平分别被添加到 I和Q信号。 在一对直流电压对被改变并顺序地添加到I和Q信号的状态下,检索使调制信号的信号电平成为预定参考电平的直流电压对的多个组合, 并且正交误差通过联立方程式计算,其中所检索的直流电压对的多个组合,调制信号的信号电平和载波信号的正交误差的各个值是变量。

    Optimized testing of bit fields
    22.
    发明申请
    Optimized testing of bit fields 失效
    优化位字段测试

    公开(公告)号:US20040210811A1

    公开(公告)日:2004-10-21

    申请号:US10414705

    申请日:2003-04-15

    摘要: A method for comparing bit field contents for bit fields comprising less than a full complement of the source is provided. The method includes creating a mask covering the bit field in the source, setting bit positions within the mask that are outside the bit field in the source to predetermined values, combining the source against the mask to form an intermediate result, and comparing bits in the intermediate result to provide a final result. Alternately, the method may form a mask, combining the bit field with a comparison value to form an intermediate value, and perform a combined function using the mask to select bits from the intermediate value, or fixed zero or one values, and comparing this result with zero.

    摘要翻译: 提供了一种用于比较包括小于源的完整补码的比特字段的比特字段内容的方法。 该方法包括创建覆盖源中的位字段的掩码,将源内的位域之外的掩码内的位位置设置为预定值,将源与掩码组合以形成中间结果,并且比较 中间结果提供最终结果。 或者,该方法可以形成掩模,将比特字段与比较值组合以形成中间值,并且使用掩码执行组合函数以从中间值或固定的零或一个值中选择比特,并将该结果进行比较 零。

    Character string processing apparatus, character string processing method, and image-forming apparatus
    23.
    发明申请
    Character string processing apparatus, character string processing method, and image-forming apparatus 有权
    字符串处理装置,字符串处理方法以及图像形成装置

    公开(公告)号:US20040187061A1

    公开(公告)日:2004-09-23

    申请号:US10758219

    申请日:2004-01-16

    发明人: Toru Matsuda

    摘要: A character string processing apparatus converting a character string encoded by a first encoding method to a second encoding method selected from a plurality of encoding methods is disclosed. The character string processing apparatus includes an encoding method determination part that selects the encoding methods, obtains, with respect to each selected encoding method, at least one of the number information and the position information of one or more replacement codes at the time of converting the character string to the selected encoding method, and determines the second encoding method based on at least one of the number information and the position information.

    摘要翻译: 公开了将从第一编码方法编码的字符串转换为从多种编码方法中选择的第二编码方法的字符串处理装置。 字符串处理装置包括:编码方法确定部,选择编码方法,对于每个选择的编码方法,获得在转换时的一个或多个替换码的数量信息和位置信息中的至少一个 字符串到所选择的编码方法,并且基于数字信息和位置信息中的至少一个确定第二编码方法。

    Providing a corrected delivery address
    24.
    发明申请
    Providing a corrected delivery address 有权
    提供更正的交货地址

    公开(公告)号:US20040177305A1

    公开(公告)日:2004-09-09

    申请号:US10665456

    申请日:2003-09-18

    CPC分类号: G06Q10/08

    摘要: Providing a corrected delivery address comprises receiving a plurality of first data elements, each of the plurality of first data elements comprising a first portion and a second portion. Next providing a corrected delivery address comprises providing a second data element, the second data element corresponding to one of the plurality of first data elements and comprising a corrected version of the second portion of the corresponding first data element. Then providing a corrected delivery address comprises receiving an indication that none of the second portions of the plurality of first data elements match the second data element and providing, in response to the indication, a link associating the second data element with the first data element corresponding to the second data element.

    摘要翻译: 提供校正的传递地址包括接收多个第一数据元素,所述多个第一数据元素中的每一个包括第一部分和第二部分。 接下来提供校正的传送地址包括提供第二数据元素,第二数据元素对应于多个第一数据元素之一并且包括对应的第一数据元素的第二部分的校正版本。 然后提供校正的传递地址包括接收指示,即,所述多个第一数据元素的第二部分中的任何一个都不匹配第二数据元素,并且响应于该指示,提供将第二数据元素与第一数据元素相对应的链接 到第二数据元素。

    Velocity enhancement for OFDM Systems
    25.
    发明申请
    Velocity enhancement for OFDM Systems 有权
    OFDM系统的速度增强

    公开(公告)号:US20040128605A1

    公开(公告)日:2004-07-01

    申请号:US10331692

    申请日:2002-12-30

    摘要: An orthogonal frequency division multiplexing (OFDM) transmitter method, consistent with certain embodiments of the present invention arranges OFDM data symbols representing data bits for transmission in a packet. A prescribed pattern of OFDM data symbols are removed (212) and replaced (216) with pilot symbols. The packet is then transmitted (220) to an OFDM receiver that receives the packet (224) and determines a channel correction factor from the pilot pattern. The receiver then estimates a plurality of channel correction factors, one for each of the plurality of OFDM symbols representing data (228) and uses these correction factors to correct the OFDM symbols representing data (232). Arbitrary data are then inserted in place of the pilot symbols (236). The OFDM symbols representing data along with the arbitrary data are then decoded using an error correction decoder that corrects the errors induced by substitution of the pilot symbols for data symbols (240).

    摘要翻译: 与本发明的某些实施例一致的正交频分复用(OFDM)发射机方法将表示用于传输的数据比特的OFDM数据符号排列在分组中。 用导频符号去除(212)并且替换(216)OFDM数据符号的规定模式。 然后将分组发送(220)到接收分组(224)并从导频模式确定信道校正因子的OFDM接收机。 接收机然后估计多个信道校正因子,一个用于代表数据(228)的多个OFDM符号中的每一个,并且使用这些校正因子来校正表示数据(232)的OFDM符号。 然后插入任意数据代替导频符号(236)。 然后使用错误校正解码器对表示数据以及任意数据的OFDM符号进行解码,纠错解码器校正由数据符号(240)导频符号的替换引起的错误。

    Integrated circuit having multiple modes of operation
    26.
    发明申请
    Integrated circuit having multiple modes of operation 有权
    具有多种工作模式的集成电路

    公开(公告)号:US20040098645A1

    公开(公告)日:2004-05-20

    申请号:US10301028

    申请日:2002-11-20

    摘要: A method according to one embodiment may include operating an integrated circuit in a selected mode of operation. The integrated circuit may include first circuitry and second circuitry. The first circuitry may be capable of performing at least one operation including, at least in part, generating check data based at least in part upon other data, regenerating the other data based at least in part upon the check data, and/or determining locations of the check data and the other data in storage. The second circuitry may be capable of controlling, at least in part, at least one interface to transmit from and/or receive at the integrated circuit the check data and/or the other data. Depending at least in part upon the selected mode of operation, the first circuitry may be either enabled to perform or disabled from performing the at least one operation.

    摘要翻译: 根据一个实施例的方法可以包括以所选择的操作模式操作集成电路。 集成电路可以包括第一电路和第二电路。 第一电路可以能够执行至少一个操作,至少部分地至少部分地基于其他数据生成检查数据,至少部分地基于检查数据重新生成其他数据,和/或确定位置 的检查数据和存储中的其他数据。 第二电路可能能够至少部分地控制至少一个接口,以在集成电路中从和/或接收检查数据和/或其他数据。 至少部分地基于所选择的操作模式,可以使第一电路能够执行或禁止执行至少一个操作。

    Method and device for testing bit errors
    27.
    发明申请
    Method and device for testing bit errors 失效
    用于测试位错误的方法和设备

    公开(公告)号:US20040073860A1

    公开(公告)日:2004-04-15

    申请号:US10686693

    申请日:2003-10-15

    发明人: Naonori Nishioka

    CPC分类号: H04L1/244 H04L1/203

    摘要: In a method and a device for testing a plurality of measured devices in parallel by using a single signal generator and a single bit error measuring device, a serial signal for test is converted into parallel signals corresponding to channels for a plurality of measured devices and a redundant channel to be demultiplexed for the measured devices, a passing signal through the redundant channel is converted into a channel determination signal for specifying an alignment of the measured devices, output signals of the measured devices and the channel determination signal are multiplexed corresponding to a demultiplexing mode, and bit errors are measured from the multiplexed signals and measured devices concerning the bit errors are detected from the channel determination signal.

    摘要翻译: 在通过使用单个信号发生器和单个位错误测量装置来并行测试多个测量装置的方法和装置中,用于测试的串行信号被转换成对应于多个测量装置的信道的并行信号,并且 冗余信道被解复用于所测量的设备,通过冗余信道的通过信号被转换成用于指定测量设备的对准的信道确定信号,测量设备的输出信号和信道确定信号被多路复用,对应于解复用 模式和比特错误,并且从信道确定信号检测与位错误有关的被测量的设备。

    Method and apparatus for isolating faulty semiconductor devices in a multiple stream graphics system
    28.
    发明申请
    Method and apparatus for isolating faulty semiconductor devices in a multiple stream graphics system 有权
    用于隔离多流图形系统中的有缺陷的半导体器件的方法和装置

    公开(公告)号:US20040073857A1

    公开(公告)日:2004-04-15

    申请号:US10267761

    申请日:2002-10-09

    CPC分类号: G06F11/267

    摘要: A method and an apparatus are provided for isolating faulty semiconductor devices in a multiple stream graphics system. The apparatus includes a buffer adapted to receive a plurality of data streams. The apparatus further includes a convolver comprising at least one convolution signature register; a router adapted to route the data streams from the buffer to the convolver, wherein the router comprises at least one router signature register; and an analyzer adapted to access the convolution and router signature registers, wherein the analyzer is capable of isolating at least one of a faulty semiconductor device and a faulty interconnection using the contents of the convolution and router signature registers.

    摘要翻译: 提供一种用于隔离多流图形系统中的有缺陷的半导体器件的方法和装置。 该装置包括适于接收多个数据流的缓冲器。 该装置还包括包括至少一个卷积特征寄存器的卷积器; 适于将数据流从缓冲器路由到卷积器的路由器,其中路由器包括至少一个路由器签名寄存器; 以及适于访问卷积和路由器签名寄存器的分析器,其中分析器能够使用卷积和路由器签名寄存器的内容来隔离故障半导体器件和故障互连中的至少一个。

    Representing and manipulating correlithm objects using quantum objects
    29.
    发明申请
    Representing and manipulating correlithm objects using quantum objects 失效
    用量子对象表示和操纵相关对象

    公开(公告)号:US20040044940A1

    公开(公告)日:2004-03-04

    申请号:US10634490

    申请日:2003-08-05

    CPC分类号: G06N99/002 B82Y10/00

    摘要: Performing operations using quantum correlithm objects includes establishing real states, where each real state comprises an element of a real space, and encoding the real states as quantum objects representing a correlithm object. The correlithm object is projected to the real space using a measurement basis, and measurement values corresponding to the measurement basis are determined. The projected correlithm object is retrieved according to the measurement values.

    摘要翻译: 使用量子相关对象执行操作包括建立真实状态,其中每个实际状态包括实际空间的元素,并将实体状态编码为表示相关对象的量子对象。 使用测量基础将相关对象投影到实际空间,并且确定与测量基础相对应的测量值。 根据测量值检索投影相关对象。

    Failure detecting device
    30.
    发明申请
    Failure detecting device 有权
    故障检测装置

    公开(公告)号:US20030182989A1

    公开(公告)日:2003-10-02

    申请号:US10298935

    申请日:2002-11-19

    发明人: Yousuke Fukuzawa

    摘要: A failure detecting device is provided, which includes the transistor for driving the excitation coil of the relay connected to the battery, the power supply monitors for monitoring an output of the relay, the EEPROM for storing failure presence or absence information, and the microcomputer for writing the failure presence or absence information in the EEPROM at the time of power OFF, reading the failure presence or absence information from the EEPROM at the time of power ON, and judging a failure state based on a voltage value detected by the power supply monitor in the case in which a failure is present.

    摘要翻译: 提供一种故障检测装置,其包括用于驱动连接到电池的继电器的励磁线圈的晶体管,电源监视器用于监视继电器的输出,用于存储故障存在或不存在信息的EEPROM,以及用于 在电源OFF时将EEPROM中的故障存在或不存在信息写入EEPROM,在电源ON时从EEPROM读出故障存在或不存在信息,并根据电源监视器检测到的电压值判断故障状态 在存在故障的情况下。