公开(公告)号：US07619998B2

公开(公告)日：2009-11-17

申请号：US10782929

申请日：2004-02-23

申请人： Shinji Takeda ,  Atsushi Fujiwara ,  Hitoshi Yoshino ,  Toru Otsu

发明人： Shinji Takeda ,  Atsushi Fujiwara ,  Hitoshi Yoshino ,  Toru Otsu

IPC分类号： H04H20/71

CPC分类号： H04W68/00 ,  H04L45/302 ,  H04W4/24 ,  H04W40/02 ,  H04W48/08 ,  H04W48/16 ,  H04W84/18 ,  Y02D70/142 ,  Y02D70/22 ,  Y02D70/30

摘要： The multi-hop communication system according to the present invention is configured by a radio control station 1 connected to a core network, and radio stations 21, 22, 31-33. The radio control station 1 has a control signal TX/RX unit 12 which transmits/receives the control signal, an information signal TX/RX unit 13 which transmits/receives the information signal, and a communication channel controller 15 which transmits a “usage notification” indicating usage of communication channels managed by the radio control station 1 to the radio stations 21, 22, 31-33 using the control signal. The radio station has a control signal TX/RX unit 42 which transmits/receives the control signal, and an information signal TX/RX unit 43 which transmits/receives the information signal.

摘要翻译： 根据本发明的多跳通信系统由连接到核心网络的无线电控制站1和无线电台21,22,31-33构成。 无线电控制站1具有发送/接收控制信号的控制信号TX / RX单元12，发送/接收信息信号的信息信号TX / RX单元13以及发送“使用通知”的通信信道控制器15 使用控制信号指示由无线电控制站1管理的通信信道对无线电站21,22,31-33的使用。 无线电台具有发送/接收控制信号的控制信号TX / RX单元42以及发送/接收信息信号的信息信号TX / RX单元43。

公开(公告)号：US20090052374A1

公开(公告)日：2009-02-26

申请号：US11816332

申请日：2006-02-15

申请人： Shinji Takeda ,  Kengo Yagyu ,  Hidenori Aoki ,  Yoichi Matsumoto

发明人： Shinji Takeda ,  Kengo Yagyu ,  Hidenori Aoki ,  Yoichi Matsumoto

IPC分类号： H04W40/02

CPC分类号： H04W40/28 ,  H04L45/00 ,  H04L45/26 ,  H04L45/52 ,  H04W40/04

摘要： A wireless communication apparatus for performing communication via a plurality of wireless interfaces in a wireless ad hoc network is disclosed. When the wireless communication apparatus receives a request frame via one of the plurality of wireless interfaces, the wireless communication apparatus sends the request frame from at least two wireless interfaces in the plurality of wireless interfaces. In addition, the wireless communication apparatus selects a wireless interface to be used for communication from among the plurality of wireless interfaces based on the request frame.

摘要翻译： 公开了一种用于在无线自组织网络中经由多个无线接口进行通信的无线通信装置。 当无线通信装置经由多个无线接口之一接收到请求帧时，无线通信装置从多个无线接口中的至少两个无线接口发送请求帧。 此外，无线通信装置基于请求帧从多个无线接口中选择要用于通信的无线接口。

公开(公告)号：US20080290529A1

公开(公告)日：2008-11-27

申请号：US12138637

申请日：2008-06-13

申请人： Shinji TAKEDA ,  Takashi Masuko ,  Masami Yusa ,  Tooru Kikuchi ,  Yasuo Miyadera ,  Iwao Maekawa ,  Mitsuo Yamasaki ,  Akira Kageyama ,  Aizou Kaneda

发明人： Shinji TAKEDA ,  Takashi Masuko ,  Masami Yusa ,  Tooru Kikuchi ,  Yasuo Miyadera ,  Iwao Maekawa ,  Mitsuo Yamasaki ,  Akira Kageyama ,  Aizou Kaneda

IPC分类号： H01L23/18 ,  H01L21/58

CPC分类号： H01L24/27 ,  H01L23/49513 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/743 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/181 ,  Y10T428/28 ,  H01L2924/00 ,  H01L2924/01014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

摘要： A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250 ° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.

摘要翻译： 将半导体芯片与吸水率为1.5体积％以下的薄膜状有机芯片接合材料贴合在引线框架上; 具有1.0体积％以下的饱和吸湿性，在250℃的温度下具有不大于3.0重量％的残留挥发组分，弹性模量为10MPa以下。半导体装置 这样获得的半导体器件的封装的回流焊接期间不会发生回流裂纹。

公开(公告)号：US07352729B2

公开(公告)日：2008-04-01

申请号：US10376244

申请日：2003-03-03

申请人： Atsushi Fujiwara ,  Shinji Takeda ,  Hitoshi Yoshino ,  Toru Otsu

发明人： Atsushi Fujiwara ,  Shinji Takeda ,  Hitoshi Yoshino ,  Toru Otsu

IPC分类号： H04Q7/24

CPC分类号： H04L45/00 ,  H04W40/00 ,  H04W40/08 ,  H04W40/16 ,  H04W40/246 ,  H04W88/04 ,  Y02D70/324 ,  Y02D70/34

摘要： A destination station in a wireless communication system for a multi-hop connection selects a transmission path having a minimum total of required transmission power values of respective stations on the transmission path among candidates of the transmission path from a source station to the destination station and transmits a pilot signal to the source station and a relay station, the pilot signal including identification information about the respective stations on the selected transmission path and required transmission power values thereof. Thus, the source station and the relay station, which have received this pilot signal, can determine the transmission path having the minimum total of the required transmission power values by use of the identification information included in the received pilot signal.

摘要翻译： 用于多跳连接的无线通信系统中的目的站在从源站到目的站的传输路径的候选中选择具有传输路径上各站的所需发射功率值的最小总和的传输路径，并且发送 向所述源站和中继站发送导频信号，所述导频信号包括关于所选传输路径上的各个站的标识信息及其所需的传输功率值。 因此，已经接收到该导频信号的源站和中继站可以通过使用包含在接收到的导频信号中的识别信息来确定具有所需传输功率值的最小总数的传输路径。

公开(公告)号：US20070280192A1

公开(公告)日：2007-12-06

申请号：US10590033

申请日：2005-02-17

申请人： Kengo Yagyu ,  Shinji Takeda ,  Hidenori Aoki

发明人： Kengo Yagyu ,  Shinji Takeda ,  Hidenori Aoki

IPC分类号： H04J3/24

CPC分类号： H04L45/00 ,  H04L12/4625 ,  H04L45/48 ,  H04W40/02 ,  H04W88/08 ,  Y02D70/142 ,  Y02D70/22 ,  Y02D70/30

摘要： A fault-tolerant packet transmission system is disclosed that can avoid localized load concentration on a specific portion of a network, while autonomously keeping route optimization, without adding a route control function to non-mesh devices. In a packet transmission system including multiple wireless base stations and one or more terminal devices belonging to one of the wireless base stations, each of the wireless base stations has a location table describing each of the terminal devices associated with a corresponding wireless base station to which the terminal device currently belongs. The wireless base stations exchange the information in the location table with each other to update the location tables and forward a received packet to the next hop along a transmission route toward a destination terminal device.

摘要翻译： 公开了一种容错分组传输系统，其可以避免在网络的特定部分上的局部负载集中，同时自主地保持路由优化，而不向非网状设备添加路由控制功能。 在包括属于无线基站之一的多个无线基站和一个或多个终端设备的分组传输系统中，每个无线基站具有描述与相应无线基站相关联的每个终端设备的位置表， 终端设备当前属于。 无线基站将位置表中的信息彼此交换以更新位置表，并且将接收到的分组转发到朝向目的地终端设备的传输路由的下一跳。

公开(公告)号：US07274616B2

公开(公告)日：2007-09-25

申请号：US11322425

申请日：2006-01-03

申请人： Hiroshi Furuta ,  Kenjyu Shimogawa ,  Ichirou Mizuguchi ,  Junji Monden ,  Shinji Takeda

发明人： Hiroshi Furuta ,  Kenjyu Shimogawa ,  Ichirou Mizuguchi ,  Junji Monden ,  Shinji Takeda

IPC分类号： G11C5/14 ,  G11C7/00

CPC分类号： G11C11/417 ,  G11C5/147

摘要： An integrated circuit apparatus includes a SRAM cell array having a plurality of memory cells formed of CMOSFET arranged lattice-like. The SRAM cell array has a pair of power line and ground line in each of 1-bit sequences. The integrated circuit apparatus also includes a detector detecting the occurrence of latch-up for each 1-bit sequence and outputting a detection signal, and a power controller controlling a power supply voltage to the power line for each 1-bit sequence. The power controller reduces a voltage to be supplied to the power line in the 1-bit sequence where latch-up is occurring down to a predetermined value according to the detection signal.

摘要翻译： 集成电路装置包括具有由格栅状布置的CMOSFET形成的多个存储单元的SRAM单元阵列。 SRAM单元阵列在1位序列中具有一对电源线和地线。 集成电路装置还包括检测器，检测每1位序列的锁存的发生并输出检测信号;以及功率控制器，其针对每个1位序列控制对电力线的电源电压。 功率控制器根据检测信号将按照1位序列提供给电力线的电压降低到锁定状态下降到预定值。

公开(公告)号：US07273652B2

公开(公告)日：2007-09-25

申请号：US10270447

申请日：2002-10-15

申请人： Shinji Takeda ,  Noriyuki Taguchi ,  Kazumi Kokaji ,  Osamu Hirai

发明人： Shinji Takeda ,  Noriyuki Taguchi ,  Kazumi Kokaji ,  Osamu Hirai

IPC分类号： B32B5/16

CPC分类号： B82Y30/00 ,  D01D5/24 ,  D01F9/12 ,  Y10S977/776 ,  Y10S977/788 ,  Y10S977/842 ,  Y10S977/846 ,  Y10T428/249953 ,  Y10T428/249971 ,  Y10T428/2913 ,  Y10T428/2918 ,  Y10T428/30

摘要： Production of hollow carbon fibers and hollow carbon particles includes baking and carbonization of polymer particles having a specified volume after deformation. A metal-deposited carbon fiber with metal deposited inside and/or outside the hollow carbon fiber is applicable to electron discharge devices. The thickness and crystallinity of the graphite layer can be freely controlled. Since almost no by-product is generated, separation and refining using a solvent is not required. A hollow carbon particle of desired shape can be produced at a high yield rate. The hollow carbon fiber represented by a carbon nano-tube can be controlled in such a way that a low resistance and uniform shape are provided so that there is an increase in the amount of electrons discharged from the hollow carbon fiber. Use of this hollow carbon fiber as an electron discharge source provides an excellent electron discharge device characterized by stable pixels.

摘要翻译： 中空碳纤维和中空碳颗粒的制造包括在变形后具有规定体积的聚合物颗粒的烘烤和碳化。 在中空碳纤维内部和/或外部沉积有金属的金属沉积碳纤维可应用于电子放电装置。 石墨层的厚度和结晶度可以自由控制。 由于几乎不产生副产物，因此不需要使用溶剂的分离和精制。 可以以高产率制造所需形状的中空碳颗粒。 由碳纳米管表示的中空碳纤维可以以这样的方式进行控制，使得提供低电阻和均匀的形状，使得从中空碳纤维排出的电子量增加。 使用该中空碳纤维作为电子放电源提供了以稳定像素为特征的优异的电子放电装置。

公开(公告)号：US20060164905A1

公开(公告)日：2006-07-27

申请号：US11322425

申请日：2006-01-03

申请人： Hiroshi Furuta ,  Kenjyu Shimogawa ,  Ichirou Mizuguchi ,  Junji Monden ,  Shinji Takeda

发明人： Hiroshi Furuta ,  Kenjyu Shimogawa ,  Ichirou Mizuguchi ,  Junji Monden ,  Shinji Takeda

IPC分类号： G11C5/14

CPC分类号： G11C11/417 ,  G11C5/147

摘要： An integrated circuit apparatus includes a SRAM cell array having a plurality of memory cells formed of CMOSFET arranged lattice-like. The SRAM cell array has a pair of power line and ground line in each of 1-bit sequences. The integrated circuit apparatus also includes a detector detecting the occurrence of latch-up for each 1-bit sequence and outputting a detection signal, and a power controller controlling a power supply voltage to the power line for each 1-bit sequence. The power controller reduces a voltage to be supplied to the power line in the 1-bit sequence where latch-up is occurring down to a predetermined value according to the detection signal.

摘要翻译： 集成电路装置包括具有由格栅状布置的CMOSFET形成的多个存储单元的SRAM单元阵列。 SRAM单元阵列在1位序列中具有一对电源线和地线。 集成电路装置还包括检测器，检测每1位序列的锁存的发生并输出检测信号;以及功率控制器，其针对每个1位序列控制对电力线的电源电压。 功率控制器根据检测信号将按照1位序列提供给电力线的电压降低到锁定状态下降到预定值。

公开(公告)号：US07012320B2

公开(公告)日：2006-03-14

申请号：US09785486

申请日：2001-02-20

申请人： Shinji Takeda ,  Takashi Masuko ,  Masami Yusa ,  Tooru Kikuchi ,  Yasuo Miyadera ,  Iwao Maekawa ,  Mitsuo Yamasaki ,  Akira Kageyama ,  Aizou Kaneda

发明人： Shinji Takeda ,  Takashi Masuko ,  Masami Yusa ,  Tooru Kikuchi ,  Yasuo Miyadera ,  Iwao Maekawa ,  Mitsuo Yamasaki ,  Akira Kageyama ,  Aizou Kaneda

IPC分类号： H01L23/495

CPC分类号： H01L24/27 ,  H01L23/49513 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/743 ,  H01L24/83 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/01014 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.

公开(公告)号：US20060007739A1

公开(公告)日：2006-01-12

申请号：US11130141

申请日：2005-05-17

申请人： Shinji Takeda ,  Yoshiharu Hirata ,  Naokazu Kuzuno

发明人： Shinji Takeda ,  Yoshiharu Hirata ,  Naokazu Kuzuno

IPC分类号： G11C11/34

CPC分类号： G11C29/4401 ,  G11C16/04 ,  G11C29/44 ,  G11C29/50004 ,  G11C29/78 ,  G11C2029/0405

摘要： Data read out from each memory cell in a memory cell array is compared with an expected value by a comparator, and the quality of a memory cell is determined by performing program verify and erase verify. Based on the comparison result of the comparator, a detected defective cell is repaired by replacing it with a spare cell. Every time a defective cell is replaced with a spare cell, information on the defective cell is stored in a register, and whether a defective cell exists and whether the repair is possible are determined on the basis of the information. When the repair is possible, a control circuit is caused to execute control, and a detected defective cell is repaired by replacing it with a spare cell. When the repair is impossible, the defect repair stops.