Integration of an amorphous silicon resistive switching device
    31.
    发明授权
    Integration of an amorphous silicon resistive switching device 有权
    集成非晶硅电阻开关器件

    公开(公告)号:US08723154B2

    公开(公告)日:2014-05-13

    申请号:US12894057

    申请日:2010-09-29

    摘要: An integrated circuit device. The integrated circuit device includes a semiconductor substrate having a surface region. A gate dielectric layer overlies the surface region of the substrate. The device includes a MOS device having a p+ active region. The p+ active region forms a first electrode for a resistive switching device. The resistive switching device includes an amorphous silicon switching material overlying the p+ active region and a metal electrode overlies the first metal conductor structure. The metal electrode includes a metal material, upon application of a positive bias to the metal electrode, forms a metal region in the amorphous silicon switching material. The MOS device provides for a select transistor for the integrated circuit device.

    摘要翻译: 集成电路器件。 集成电路器件包括具有表面区域的半导体衬底。 栅极电介质层覆盖在衬底的表面区域上。 该器件包括具有p +有源区的MOS器件。 p +有源区形成用于电阻式开关器件的第一电极。 电阻开关器件包括覆盖p +有源区的非晶硅开关材料和覆盖在第一金属导体结构上的金属电极。 金属电极包括金属材料,当对金属电极施加正偏压时,在非晶硅开关材料中形成金属区域。 MOS器件为集成电路器件提供选择晶体管。

    Hetero resistive switching material layer in RRAM device and method
    33.
    发明授权
    Hetero resistive switching material layer in RRAM device and method 有权
    RRAM装置和方法中的异质电阻开关材料层

    公开(公告)号:US08467227B1

    公开(公告)日:2013-06-18

    申请号:US13290024

    申请日:2011-11-04

    申请人: Sung Hyun Jo

    发明人: Sung Hyun Jo

    IPC分类号: G11C11/00

    摘要: A non-volatile memory device includes a first electrode, a resistive switching material stack overlying the first electrode. The resistive switching material stack comprising a first resistive switching material and a second resistive switching material. The second resistive switching material overlies the first electrode and the first resistive switching material overlying the second resistive switching material. The first resistive switching material is characterized by a first switching voltage having a first amplitude. The second resistive switching material is characterized by a second switching voltage having a second amplitude no greater than the first switching voltage. A second electrode comprising at least a metal material physically and electrically in contact with the first resistive switching material overlies the first resistive switching material.

    摘要翻译: 非易失性存储器件包括第一电极,覆盖第一电极的电阻开关材料堆叠。 电阻开关材料堆叠包括第一电阻开关材料和第二电阻开关材料。 第二电阻开关材料覆盖在第二电阻开关材料上的第一电极和第一电阻开关材料。 第一电阻开关材料的特征在于具有第一幅度的第一开关电压。 第二电阻开关材料的特征在于具有不大于第一开关电压的第二幅度的第二开关电压。 至少包括与第一电阻式开关材料物理和电接触的金属材料的第二电极覆盖在第一电阻开关材料上。

    RESISTOR STRUCTURE FOR A NON-VOLATILE MEMORY DEVICE AND METHOD
    34.
    发明申请
    RESISTOR STRUCTURE FOR A NON-VOLATILE MEMORY DEVICE AND METHOD 有权
    非易失性存储器件的电阻结构和方法

    公开(公告)号:US20120075907A1

    公开(公告)日:2012-03-29

    申请号:US12894087

    申请日:2010-09-29

    申请人: Sung Hyun JO

    发明人: Sung Hyun JO

    IPC分类号: G11C11/00 H01L45/00 H01L21/02

    摘要: A non-volatile resistive switching memory device. The device includes a first electrode, a second electrode, a switching material in direct contact with a metal region of the second electrode, and a resistive material disposed between the second electrode and the switching material. The resistive material has an ohmic characteristic and a resistance substantially the same as an on state resistance of the switching device. The resistive material allows for a change in a resistance of the switching material upon application of voltage pulse without time delay and free of a reverse bias after the voltage pulse. The first voltage pulse causes a programming current to flow from the second electrode to the first electrode. The resistive material further causes the programming current to be no greater than a predetermined value.

    摘要翻译: 非易失性电阻式开关存储器件。 该装置包括第一电极,第二电极,与第二电极的金属区域直接接触的开关材料,以及设置在第二电极和开关材料之间的电阻材料。 电阻材料具有与开关器件的导通状态电阻基本相同的欧姆特性和电阻。 电阻材料允许在施加电压脉冲时开关材料的电阻变化而没有时间延迟并且在电压脉冲之后没有反向偏置。 第一电压脉冲导致编程电流从第二电极流向第一电极。 电阻材料进一步使编程电流不大于预定值。

    TWO TERMINAL RESISTIVE SWITCHING DEVICE STRUCTURE AND METHOD OF FABRICATING
    35.
    发明申请
    TWO TERMINAL RESISTIVE SWITCHING DEVICE STRUCTURE AND METHOD OF FABRICATING 有权
    两端电阻开关器件结构及其制作方法

    公开(公告)号:US20120015506A1

    公开(公告)日:2012-01-19

    申请号:US12835704

    申请日:2010-07-13

    IPC分类号: H01L21/02

    摘要: A method of forming a two terminal device. The method includes forming a first dielectric material overlying a surface region of a substrate. A bottom wiring material is formed overlying the first dielectric material and a switching material is deposited overlying the bottom wiring material. The bottom wiring material and the switching material is subjected to a first patterning and etching process to form a first structure having a top surface region and a side region. The first structure includes at least a bottom wiring structure and a switching element having a first side region, and a top surface region including an exposed region of the switching element. A second dielectric material is formed overlying at least the first structure including the exposed region of the switching element. The method forms an opening region in a portion of the second dielectric layer to expose a portion of the top surface region of the switching element. A top wiring material including a conductive material is formed overlying at lease the opening region such that the conductive material is in direct contact with the switching element. A second etching process is performed to form at least a top wiring structure. In a specific embodiment, the side region of the first structure including a first side region of the switching element is free from a contaminant conductive material from the second etching process.

    摘要翻译: 一种形成两个终端设备的方法。 该方法包括形成覆盖在衬底的表面区域上的第一电介质材料。 底部布线材料形成在第一介电材料上方,并且覆盖在底部布线材料上的开关材料沉积。 对底部布线材料和开关材料进行第一图案化和蚀刻工艺以形成具有顶表面区域和侧面区域的第一结构。 第一结构至少包括底部布线结构和具有第一侧面区域的开关元件和包括开关元件的暴露区域的顶表面区域。 至少形成包括开关元件的暴露区域的第一结构的第二电介质材料。 该方法在第二电介质层的一部分中形成开口区域,以露出开关元件的顶表面区域的一部分。 包括导电材料的顶部布线材料形成为覆盖开口区域,使得导电材料与开关元件直接接触。 执行第二蚀刻工艺以形成至少顶部布线结构。 在具体实施例中,包括开关元件的第一侧区域的第一结构的侧面区域没有来自第二蚀刻工艺的污染物导电材料。

    Intrinsic Programming Current Control for a RRAM
    36.
    发明申请
    Intrinsic Programming Current Control for a RRAM 审中-公开
    RRAM内部编程电流控制

    公开(公告)号:US20120007035A1

    公开(公告)日:2012-01-12

    申请号:US12834610

    申请日:2010-07-12

    申请人: Sung Hyun JO Wei Lu

    发明人: Sung Hyun JO Wei Lu

    IPC分类号: H01L45/00 H01L21/02

    摘要: A resistive switching device. The device includes a substrate and a first dielectric material overlying a surface region of the substrate. The device includes a first electrode overlying the first dielectric material and an optional buffer layer overlying the first electrode. The device includes a second electrode structure. The second electrode includes at least a silver material. In a specific embodiment, a switching material overlies the optional buffer layer and disposed between the first electrode and the second electrode. The switching material comprises an amorphous silicon material in a specific embodiment. The amorphous silicon material is characterized by a plurality of defect sites and a defect density. The defect density is configured to intrinsically control programming current for the device.

    摘要翻译: 电阻式开关装置。 该器件包括衬底和覆盖衬底的表面区域的第一介电材料。 该器件包括覆盖第一电介质材料的第一电极和覆盖第一电极的可选缓冲层。 该装置包括第二电极结构。 第二电极至少包括银材料。 在具体实施例中,开关材料覆盖在可选缓冲层上并且设置在第一电极和第二电极之间。 在特定实施例中,开关材料包括非晶硅材料。 非晶硅材料的特征在于多个缺陷部位和缺陷密度。 缺陷密度被配置为本质上控制器件的编程电流。

    WRITE AND ERASE SCHEME FOR RESISTIVE MEMORY DEVICE
    37.
    发明申请
    WRITE AND ERASE SCHEME FOR RESISTIVE MEMORY DEVICE 有权
    电阻式存储器件的写入和擦除方案

    公开(公告)号:US20110305066A1

    公开(公告)日:2011-12-15

    申请号:US12815369

    申请日:2010-06-14

    IPC分类号: G11C11/00 G01R31/28

    摘要: A method for programming a two terminal resistive memory device, the method includes applying a bias voltage to a first electrode of a resistive memory cell of the device; measuring a current flowing through the cell; and stopping the applying of the bias voltage if the measured current is equal to or greater than a predetermined value.

    摘要翻译: 一种用于编程两端电阻式存储器件的方法,所述方法包括:将偏置电压施加到所述器件的电阻存储器单元的第一电极; 测量流过电池的电流; 如果测量的电流等于或大于预定值,则停止施加偏置电压。

    Device switching using layered device structure
    38.
    发明授权
    Device switching using layered device structure 有权
    使用分层设备结构的设备切换

    公开(公告)号:US08884261B2

    公开(公告)日:2014-11-11

    申请号:US12861432

    申请日:2010-08-23

    申请人: Sung Hyun Jo Wei Lu

    发明人: Sung Hyun Jo Wei Lu

    IPC分类号: H01L45/00 G11C13/00

    摘要: A resistive switching device. The device includes a first electrode comprising a first metal material overlying the first dielectric material and a switching material comprising an amorphous silicon material. The device includes a second electrode comprising at least a second metal material. In a specific embodiment, the device includes a buffer material disposed between the first electrode and the switching material. The buffer material provides a blocking region between the switching material and the first electrode so that the blocking region is substantially free from metal particles from the second metal material when a first voltage is applied to the second electrode.

    摘要翻译: 电阻式开关装置。 该器件包括第一电极,其包括覆盖第一电介质材料的第一金属材料和包含非晶硅材料的开关材料。 该装置包括包括至少第二金属材料的第二电极。 在具体实施例中,该装置包括设置在第一电极和开关材料之间的缓冲材料。 缓冲材料在开关材料和第一电极之间提供阻挡区域,使得当向第二电极施加第一电压时,阻挡区域基本上不含有来自第二金属材料的金属颗粒。

    Write and erase scheme for resistive memory device
    39.
    发明授权
    Write and erase scheme for resistive memory device 有权
    电阻式存储器件的写和擦除方案

    公开(公告)号:US08787069B2

    公开(公告)日:2014-07-22

    申请号:US13592224

    申请日:2012-08-22

    IPC分类号: G11C11/00

    摘要: A method for programming a two terminal resistive memory device, the method includes applying a bias voltage to a first electrode of a resistive memory cell of the device; measuring a current flowing through the cell; and stopping the applying of the bias voltage if the measured current is equal to or greater than a predetermined value.

    摘要翻译: 一种用于编程两端电阻式存储器件的方法,所述方法包括:将偏置电压施加到所述器件的电阻存储器单元的第一电极; 测量流过电池的电流; 如果测量的电流等于或大于预定值,则停止施加偏置电压。

    Resistive switching for non volatile memory device using an integrated breakdown element
    40.
    发明授权
    Resistive switching for non volatile memory device using an integrated breakdown element 有权
    使用集成击穿元件的非易失性存储器件的电阻式开关

    公开(公告)号:US08750020B2

    公开(公告)日:2014-06-10

    申请号:US13735814

    申请日:2013-01-07

    申请人: Wei Lu Sung Hyun Jo

    发明人: Wei Lu Sung Hyun Jo

    IPC分类号: G11C11/00 G11C11/15

    摘要: A method of suppressing propagation of leakage current in an array of switching devices. The method includes providing a dielectric breakdown element integrally and serially connected to a switching element within each of the switching device. A read voltage (for example) is applied to a selected cell. The propagation of leakage current is suppressed by each of the dielectric breakdown element in unselected cells in the array. The read voltage is sufficient to cause breakdown in the selected cells but insufficient to cause breakdown in the serially connected, unselected cells in a specific embodiment. Methods to fabricate of such devices and to program, to erase and to read the device are provided.

    摘要翻译: 一种抑制开关元件阵列中漏电流传播的方法。 该方法包括提供整体并串联连接到每个开关装置内的开关元件的电介质击穿元件。 读取电压(例如)被施加到所选择的单元。 泄漏电流的传播被阵列中未选择的单元中的每个介质击穿元件抑制。 在特定实施例中,读取电压足以导致所选择的单元中的击穿,但不足以导致串联连接的未选择的单元中的击穿。 提供了制造这种设备并编程,擦除和读取设备的方法。