公开(公告)号：US08698812B2

公开(公告)日：2014-04-15

申请号：US11833533

申请日：2007-08-03

Applicant: Edward G. Callway ,  David Glen ,  Andrew Gruber ,  Gaurav Arora ,  Philip Swan

Inventor： Edward G. Callway ,  David Glen ,  Andrew Gruber ,  Gaurav Arora ,  Philip Swan

IPC: G06F15/00

CPC classification number: H04N5/46 ,  H04N5/14 ,  H04N21/42607 ,  H04N21/42653 ,  H04N21/44008

Abstract: A video graphics chip includes a graphics module configured to process incoming video information in accordance with different modes to produce a video output signal and to transmit the video output signal toward a display screen for rendering of video corresponding to the video information, and a display mode module coupled to the graphics module configured to analyze the incoming video information to determine a type of video associated with the incoming video information and to send a video mode indication of a preferred video processing mode for the incoming video information to the graphics module, where the graphics module is configured to process the incoming video information in accordance with a selected mode from the plurality of different modes based on the video mode indication received from the display module.

Abstract translation: 视频图形芯片包括：图形模块，被配置为根据不同的模式处理输入的视频信息以产生视频输出信号，并将视频输出信号发送到用于呈现与视频信息相对应的视频的显示屏幕;以及显示模式 模块，被配置为分析输入视频信息以确定与输入视频信息相关联的视频的类型，并且将用于输入视频信息的优选视频处理模式的视频模式指示发送到图形模块，其中， 图形模块被配置为基于从显示模块接收的视频模式指示，根据来自多个不同模式的选择模式处理输入视频信息。

公开(公告)号：US20130229414A1

公开(公告)日：2013-09-05

申请号：US13409993

申请日：2012-03-01

Applicant: Andrew Gruber

Inventor： Andrew Gruber

IPC: G06T15/60 ,  G06T1/20 ,  G09G5/36 ,  G06T11/40 ,  G06F13/14

CPC classification number: G06T15/40 ,  G06T15/04 ,  G06T2200/28

Abstract: This disclosure describes techniques for reducing memory access bandwidth in a graphics processing system based on destination alpha values. The techniques may include retrieving a destination alpha value from a bin buffer, the destination alpha value being generated in response to processing a first pixel associated with a first primitive. The techniques may further include determining, based on the destination alpha value, whether to perform an action that causes one or more texture values for a second pixel to not be retrieved from a texture buffer. In some examples, the action may include discarding the second pixel from a pixel processing pipeline prior to the second pixel arriving at a texture mapping stage of the pixel processing pipeline. The second pixel may be associated with a second primitive different than the first primitive.

Abstract translation: 本公开描述了用于基于目的地alpha值减少图形处理系统中的存储器访问带宽的技术。 这些技术可以包括从箱体缓冲器检索目的地α值，响应于处理与第一基元相关联的第一像素而产生目的地α值。 所述技术可以进一步包括基于目的地α值来确定是否执行导致不从纹理缓冲器检索第二像素的一个或多个纹理值的动作。 在一些示例中，动作可以包括在第二像素到达像素处理流水线的纹理映射阶段之前从像素处理流水线丢弃第二像素。 第二像素可以与不同于第一图元的第二图元相关联。

公开(公告)号：US20070279421A1

公开(公告)日：2007-12-06

申请号：US11420965

申请日：2006-05-30

Applicant: Andrew Gruber ,  Aaftab Munshi

Inventor： Andrew Gruber ,  Aaftab Munshi

IPC: G06F15/16

CPC classification number: G06T15/005 ,  G06T15/80

Abstract: A system for rendering three-dimensional graphics for display on a display using bins, the system including a graphics rendering engine configured to receive information representative of three-dimensional (3-D) objects in an object space and to render an image for display on the display, the graphics rendering engine including a processor, a pixel shader configured to perform rendering operations, and a programmable vertex shader configured to perform rendering operations, wherein the graphics rendering engine is configured to perform rendering operations and to compute locations of vertices of polygons corresponding to the 3-D objects.

Abstract translation: 一种用于渲染用于在显示器上显示的三维图形的系统，所述系统包括图形呈现引擎，所述图形呈现引擎被配置为接收表示对象空间中的三维（3-D）对象的信息，并且呈现用于显示的图像 显示器，包括处理器的图形渲染引擎，被配置为执行渲染操作的像素着色器和被配置为执行渲染操作的可编程顶点着色器，其中所述图形渲染引擎被配置为执行渲染操作并且计算多边形顶点的位置 对应于3-D对象。

公开(公告)号：US20070216693A1

公开(公告)日：2007-09-20

申请号：US11375750

申请日：2006-03-15

Applicant: Andrew Gruber

Inventor： Andrew Gruber

IPC: G06T1/00

CPC classification number: G06T15/50

Abstract: A device and method for controlling generation of a final pixel utilizes a conditional statement, referred to as an IF_NEIGHBOR statement, which when compiled, causes a programmable pixel shader to perform mip map texture lookups even if a pixel of interest does not meet the condition of the conditional statement. As such, any neighboring pixels needed for mip map selection have their associated shader code guaranteed to execute even though the pixel of interest may fail the conditional portion of the conditional statement. The device and method executes texture address calculations for pixels within a region and for pixels outside of a region but only those necessary to determine the mip map level corresponding to a pixel within the region. Execution of shader code for a current pixel is executed if any of the surrounding neighboring pixels meet the desired condition even if the current pixel does not meet the condition.

Abstract translation: 用于控制最终像素的生成的装置和方法利用称为IF_NEIGHBOR语句的条件语句，其被编译时，使可编程像素着色器执行mip映射纹理查找，即使感兴趣的像素不满足 条件语句。 因此，即使感兴趣的像素可能会失败条件语句的条件部分，mip映射选择所需的任何相邻像素也保证其相关联的着色器代码执行。 该设备和方法对区域内的像素和区域外的像素执行纹理地址计算，而仅对确定与该区域内的像素对应的mip地图级别的那些进行纹理地址计算。 即使当前像素不符合条件，任何周围的相邻像素都满足所需条件，则执行当前像素的着色器代码。

公开(公告)号：US07015930B2

公开(公告)日：2006-03-21

申请号：US10633214

申请日：2003-08-01

Applicant: Andrew Gruber

Inventor： Andrew Gruber

IPC: G06F17/00 ,  G09G5/00

CPC classification number: G06T3/4007 ,  G06T11/40

Abstract: A method and apparatus for interpolating pixel parameters based on the plurality of vertex values includes operating first and a setup mode and a calculation mode. The method and apparatus includes, while in a setup mode, generating a plurality of differential geometric values based on the plurality of vertex values, wherein the differential geometric values are independent of a parameter slope between the plurality of vertex values. While in a calculation mode, a first geometric value and second geometric value are determined based on a pixel value, a plurality of vertex values and the differential geometric values. A pixel value is determined for each of the plurality of pixels based on the vertex parameter value, the first geometric value and the second geometric value. Thereupon, pixel parameters may be interpolated on a per-pixel basis reusing the differential geometric values.

Abstract translation: 基于多个顶点值来内插像素参数的方法和装置包括第一操作和设置模式和计算模式。 该方法和装置包括在设置模式下，基于多个顶点值生成多个差分几何值，其中微分几何值与多个顶点值之间的参数斜率无关。 在计算模式中，基于像素值，多个顶点值和微分几何值来确定第一几何值和第二几何值。 基于顶点参数值，第一几何值和第二几何值，为多个像素中的每一个确定像素值。 因此，像素参数可以在每个像素的基础上进行内插，重用差分几何值。

公开(公告)号：US6115793A

公开(公告)日：2000-09-05

申请号：US22245

申请日：1998-02-11

Applicant: Andrew Gruber ,  Yury Levin

Inventor： Andrew Gruber ,  Yury Levin

IPC: G06F12/08 ,  G06F12/10

CPC classification number: G06F12/0864 ,  G06F12/0875 ,  G06F12/1054

Abstract: A cache memory system which minimizes the latency and latency uncertainty of data memory access by allocating spare cache memories to subsequent conflicting requests, and maintaining the prior requests in a separate table until the prior request is satisfied and the prior allocated cache is free. This reallocation of physical caches to conflicting requests is effected by maintaining an index to the physical cache that is separate and distinct from the logical index associated with the requests that cause the conflict. A conventional indexed cache mechanism is employed to derive the logical index from a subset of the address of the requested data. When the same logical index occurs from data requests from different blocks of memory, the conflict is resolved by assigning a free physical cache to the latter request. The latter assignment is stored in the indexed cache table, and the former assignment is stored in a separate table until it is no longer required.

Abstract translation: 一种高速缓存存储器系统，其通过将备用高速缓存存储器分配给随后的冲突请求来最小化数据存储器访问的延迟和等待时间不确定性，并且将先前的请求保持在单独的表中，直到满足先前请求并且先前分配的高速缓存是空闲的。 将物理高速缓存重新分配到冲突请求是通过维护与引起冲突的请求相关联的逻辑索引分离和不同的物理缓存的索引来实现的。 采用传统的索引缓存机制来从所请求数据的地址的子集中导出逻辑索引。 当来自不同内存块的数据请求发生相同的逻辑索引时，通过为后一个请求分配一个空闲的物理缓存来解决冲突。 后一个分配存储在索引缓存表中，前一个分配存储在单独的表中，直到不再需要。