公开(公告)号：US08058658B2

公开(公告)日：2011-11-15

申请号：US12421130

申请日：2009-04-09

申请人： Sang-Heung Lee ,  Hae Cheon Kim ,  Dong Min Kang ,  Dong-Young Kim ,  Jae Kyoung Mun ,  Hokyun Ahn ,  Jong-Won Lim ,  Woo Jin Chang ,  Hong Gu Ji ,  Eun Soo Nam

发明人： Sang-Heung Lee ,  Hae Cheon Kim ,  Dong Min Kang ,  Dong-Young Kim ,  Jae Kyoung Mun ,  Hokyun Ahn ,  Jong-Won Lim ,  Woo Jin Chang ,  Hong Gu Ji ,  Eun Soo Nam

IPC分类号： H01L27/15

CPC分类号： H01L25/167 ,  H01L2224/0603 ,  H01L2224/45014 ,  H01L2224/48137 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/30107 ,  H01L2924/00

摘要： Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.

摘要翻译： 提供了一种高速光互连装置。 高速光互连装置包括设置在绝缘体上硅（SOI））衬底上的第一半导体芯片，发光体，光检测器和第二半导体芯片。 光发射器接收来自第一半导体芯片的电信号以输出光信号。 光检测器检测光信号，将光信号转换为电信号。 第二半导体芯片接收由光学检测器转换的电信号。

公开(公告)号：US20110140825A1

公开(公告)日：2011-06-16

申请号：US12968022

申请日：2010-12-14

申请人： Seong-il KIM ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Seong-il KIM ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01F27/30

CPC分类号： H01F17/0006 ,  H01F2017/0086 ,  H01L28/10

摘要： Provided is an inductor. The inductor includes a first to a fourth conductive terminals formed in one direction within a semiconductor substrate, a first conductive line formed on one side of the semiconductor substrate and electrically connected to the second and third conductive terminals interiorly positioned among the first to fourth conductive terminals, a second conductive line formed on the one side of the semiconductor substrate and electrically connected to the first and fourth conductive terminals exteriorly positioned among the first to fourth conductive terminals, and a third conductive line formed on the other side of the semiconductor substrate and electrically connected to the first and third conductive terminals among the first to fourth conductive terminals.

摘要翻译： 提供一种电感器。 电感器包括在半导体衬底内的一个方向上形成的第一至第四导电端子，形成在半导体衬底的一侧上的第一导电线，并且电连接到内部位于第一至第四导电端子之间的第二和第三导电端子 形成在所述半导体衬底的一侧上并与外部位于所述第一至第四导电端子之间的所述第一和第四导电端子电连接的第二导电线，以及形成在所述半导体衬底的另一侧上并电连接的第三导电线 连接到第一至第四导电端子中的第一和第三导电端子。

公开(公告)号：US20100133551A1

公开(公告)日：2010-06-03

申请号：US12421130

申请日：2009-04-09

申请人： Sang-Heung Lee ,  Hae Cheon Kim ,  Dong Min Kang ,  Dong-Young Kim ,  Jae-Kyoung Mun ,  Hokyun Ahn ,  Jong-Won Lim ,  Woo Jin Chang ,  Hong Gu Ji ,  Eun Soo Nam

发明人： Sang-Heung Lee ,  Hae Cheon Kim ,  Dong Min Kang ,  Dong-Young Kim ,  Jae-Kyoung Mun ,  Hokyun Ahn ,  Jong-Won Lim ,  Woo Jin Chang ,  Hong Gu Ji ,  Eun Soo Nam

IPC分类号： H01L31/147 ,  H01L33/00

CPC分类号： H01L25/167 ,  H01L2224/0603 ,  H01L2224/45014 ,  H01L2224/48137 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/30107 ,  H01L2924/00

摘要： Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.

摘要翻译： 提供了一种高速光互连装置。 高速光互连装置包括设置在绝缘体上硅（SOI））衬底上的第一半导体芯片，发光体，光检测器和第二半导体芯片。 光发射器接收来自第一半导体芯片的电信号以输出光信号。 光检测器检测光信号，将光信号转换为电信号。 第二半导体芯片接收由光学检测器转换的电信号。

公开(公告)号：US20060108574A1

公开(公告)日：2006-05-25

申请号：US11282339

申请日：2005-11-18

申请人： Eun Soo Nam ,  Yong Won Kim ,  Seon Eui Hong ,  Myung Sook Oh ,  Bo Woo Kim

发明人： Eun Soo Nam ,  Yong Won Kim ,  Seon Eui Hong ,  Myung Sook Oh ,  Bo Woo Kim

IPC分类号： H01L29/06 ,  H01L31/0328

CPC分类号： H01L31/18 ,  B82Y20/00 ,  G02F1/017

摘要： Provided are an optoelectronic (OE) transmitter integrated circuit (IC) and method of fabricating the same using a selective growth process. In the OE transmitter IC, a driving circuit, which includes a double heterojunction bipolar transistor (DHBT) and amplifies received electric signals to drive an electroabsorption (EA) modulator, and the EA modulator with a multi-quantum well (MQW) absorption layer are integrated as a single chip on a semi-insulating substrate. The MQW absorption layer of the EA modulator and an MQW insertion layer of the DHBT are formed to different thicknesses from each other using a selective MOCVD growth process.

公开(公告)号：US08723222B2

公开(公告)日：2014-05-13

申请号：US13548522

申请日：2012-07-13

申请人： Sung Bum Bae ,  Eun Soo Nam ,  Jae Kyoung Mun ,  Sung Bock Kim ,  Hae Cheon Kim ,  Chull Won Ju ,  Sang Choon Ko ,  Jong-Won Lim ,  Ho Kyun Ahn ,  Woo Jin Chang ,  Young Rak Park

发明人： Sung Bum Bae ,  Eun Soo Nam ,  Jae Kyoung Mun ,  Sung Bock Kim ,  Hae Cheon Kim ,  Chull Won Ju ,  Sang Choon Ko ,  Jong-Won Lim ,  Ho Kyun Ahn ,  Woo Jin Chang ,  Young Rak Park

IPC分类号： H01L31/102

CPC分类号： H01L29/66446 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02647 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0883

摘要： The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen.

摘要翻译： 本发明涉及一种氮化物电子器件及其制造方法，特别涉及一种氮化物电子器件及其制造方法，该氮化物电子器件及其制造方法可以通过再生技术在同一衬底上实现各种氮化物一体化结构（ 用于包括III族元素如镓（Ga），铝（Al）和铟（In））和氮（III）的III族氮化物半导体电子器件中的半绝缘氮化镓（GaN）层的外延横向过度生长：ELOG） 。

公开(公告)号：US08609474B2

公开(公告)日：2013-12-17

申请号：US13274367

申请日：2011-10-17

申请人： Jong-Won Lim ,  Hokyun Ahn ,  Dong Min Kang ,  Woojin Chang ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Jong-Won Lim ,  Hokyun Ahn ,  Dong Min Kang ,  Woojin Chang ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01L29/772 ,  H01L21/28 ,  H01L29/423 ,  H01L29/40

CPC分类号： H01L29/42376 ,  H01L29/2003 ,  H01L29/40 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/812

摘要： Disclosed are a semiconductor device and a method of manufacturing the same. In the semiconductor device according to an exemplary embodiment of the present disclosure, at the time of forming a source electrode, a drain electrode, a field plate electrode, and a gate electrode on a substrate having a heterojunction structure such as AlGaN/GaN, the field plate electrode made of the same metal as the gate electrode is formed on the side surface of a second support part positioned below a head part of the gate electrode so as to prevent the gate electrode from collapsing and improve high-frequency and high-voltage characteristic of the semiconductor device.

摘要翻译： 公开了一种半导体器件及其制造方法。 在根据本公开的示例性实施例的半导体器件中，在具有诸如AlGaN / GaN的异质结结构的衬底上形成源电极，漏电极，场板电极和栅电极时， 由与栅电极相同的金属制成的场板电极形成在位于栅电极的头部下方的第二支撑部分的侧表面上，以防止栅电极塌陷并改善高频和高电压 半导体器件的特性。

公开(公告)号：US20120153361A1

公开(公告)日：2012-06-21

申请号：US13307069

申请日：2011-11-30

申请人： Hokyun Ahn ,  Jong-Won Lim ,  Hyung Sup Yoon ,  Byoung-Gue Min ,  Sang-Heung Lee ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Hokyun Ahn ,  Jong-Won Lim ,  Hyung Sup Yoon ,  Byoung-Gue Min ,  Sang-Heung Lee ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01L21/283 ,  H01L29/808

CPC分类号： H01L29/7831 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/66863 ,  H01L29/7787 ,  H01L29/812

摘要： Disclosed are a field-effect transistor and a manufacturing method thereof. The disclosed field-effect transistor includes: a semiconductor substrate; a source ohmic metal layer formed on one side of the semiconductor substrate; a drain ohmic metal layer formed on another side of the semiconductor substrate; a gate electrode formed between the source ohmic metal layer and the drain ohmic metal layer, on an upper portion of the semiconductor substrate; an insulating film formed on the semiconductor substrate's upper portion including the source ohmic metal layer, the drain ohmic metal layer and the gate electrode; and a plurality of field electrodes formed on an upper portion of the insulating film, wherein the insulating film below the respective field electrodes has different thicknesses.

摘要翻译： 公开了场效应晶体管及其制造方法。 所公开的场效应晶体管包括：半导体衬底; 源极欧姆金属层，形成在半导体衬底的一侧上; 形成在所述半导体衬底的另一侧上的漏极欧姆金属层; 在所述源极欧姆金属层和所述漏极欧姆金属层之间形成的栅电极，位于所述半导体衬底的上部; 形成在包括源极欧姆金属层，漏极欧姆金属层和栅电极的半导体衬底的上部上的绝缘膜; 以及形成在绝缘膜的上部的多个场电极，其中，各个场电极下方的绝缘膜具有不同的厚度。

公开(公告)号：US08130041B2

公开(公告)日：2012-03-06

申请号：US12960153

申请日：2010-12-03

申请人： Seong-Il Kim ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Seong-Il Kim ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H03F3/68

CPC分类号： H03F3/245 ,  H03F1/0261 ,  H03F1/52 ,  H03F3/19 ,  H03F3/211 ,  H03F2200/18 ,  H03F2200/451

摘要： Provided is a power amplifier device. The power amplifier device includes: a cutoff unit cutting off a direct current (DC) component of a signal delivered from a signal input terminal; a circuit protecting unit connected to the cutoff unit and stabilizing a signal delivered from the cutoff unit; and an amplification unit connected to the circuit protecting unit and amplifying a signal delivered from the circuit protecting unit, wherein the amplification unit comprises a plurality of transistors connected in parallel to the circuit protecting unit and the circuit protecting unit comprises resistors connected to between bases of the plurality of transistors.

摘要翻译： 提供了一种功率放大器装置。 功率放大器装置包括：切断单元，切断从信号输入端子发送的信号的直流（DC）分量; 连接到所述切断单元的电路保护单元，并且稳定从所述切断单元传送的信号; 以及放大单元，连接到所述电路保护单元并放大从所述电路保护单元传送的信号，其中所述放大单元包括与所述电路保护单元并联连接的多个晶体管，所述电路保护单元包括电阻器， 多个晶体管。

公开(公告)号：US07986211B2

公开(公告)日：2011-07-26

申请号：US12968022

申请日：2010-12-14

申请人： Seong-il Kim ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Seong-il Kim ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01F5/00

CPC分类号： H01F17/0006 ,  H01F2017/0086 ,  H01L28/10

摘要： Provided is an inductor. The inductor includes a first to a fourth conductive terminals formed in one direction within a semiconductor substrate, a first conductive line formed on one side of the semiconductor substrate and electrically connected to the second and third conductive terminals interiorly positioned among the first to fourth conductive terminals, a second conductive line formed on the one side of the semiconductor substrate and electrically connected to the first and fourth conductive terminals exteriorly positioned among the first to fourth conductive terminals, and a third conductive line formed on the other side of the semiconductor substrate and electrically connected to the first and third conductive terminals among the first to fourth conductive terminals.

摘要翻译： 提供一种电感器。 电感器包括在半导体衬底内的一个方向上形成的第一至第四导电端子，形成在半导体衬底的一侧上的第一导电线，并且电连接到内部位于第一至第四导电端子之间的第二和第三导电端子 形成在所述半导体衬底的一侧上并与外部位于所述第一至第四导电端子之间的所述第一和第四导电端子电连接的第二导电线，以及形成在所述半导体衬底的另一侧上并电连接的第三导电线 连接到第一至第四导电端子中的第一和第三导电端子。

公开(公告)号：US20110143505A1

公开(公告)日：2011-06-16

申请号：US12773216

申请日：2010-05-04

申请人： Hokyun AHN ,  Jong-Won Lim ,  Hyung Sup Yoon ,  Woojin Chang ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Hokyun AHN ,  Jong-Won Lim ,  Hyung Sup Yoon ,  Woojin Chang ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01L21/337

CPC分类号： H01L29/66462

摘要： Provided is a method for fabricating a field effect transistor. In the method, an active layer and a capping layer are formed on a substrate. A source electrode and a drain electrode is formed on the capping layer. A dielectric interlayer is formed on the substrate, and resist layers having first and second openings with asymmetrical depths are formed on the dielectric interlayer between the source electrode and the drain electrode. The first opening exposes the dielectric interlayer, and the second opening exposes the lowermost of the resist layers. The dielectric interlayer in the bottom of the first opening and the lowermost resist layer under the second opening are simultaneously removed to expose the capping layer to the first opening and expose the dielectric interlayer to the second opening. The capping layer of the first opening is removed to expose the active layer. A metal layer is deposited on the substrate to simultaneously form a gate electrode and a field plate in the first opening and the second opening. The resist layers are removed to lift off the metal layer on the resist layers.

摘要翻译： 提供了一种用于制造场效应晶体管的方法。 在该方法中，在基板上形成有源层和覆盖层。 源极电极和漏电极形成在覆盖层上。 在基板上形成电介质中间层，在源电极和漏极之间的电介质层间形成有具有不对称深度的第一和第二开口的抗蚀剂层。 第一开口露出电介质中间层，第二开口露出最低层的抗蚀剂层。 同时除去第一开口底部的电介质中间层和第二开口下面的最下面的抗蚀剂层，以将覆盖层暴露于第一开口，并将电介质中间层暴露于第二开口。 去除第一开口的覆盖层以暴露活性层。 金属层沉积在基板上，以在第一开口和第二开口中同时形成栅电极和场板。 去除抗蚀剂层以剥离抗蚀剂层上的金属层。