Abstract:
Systems and methods are presented for improving the ability to withstand slow speed mute via diversity transmission while avoiding loss in link level margin. In exemplary embodiments of the present invention, systems and methods are presented for improving resistance to slow speed muting by employing transmit diversity where a second signal is not a replica of the original signal. The second signal can be generated, for example, by using only a COFDM FFT bin that contained the cluster sync bit while setting all other bins to zero. That is, only the spectral portion of interest of the COFDM signal need be utilized. In such exemplary embodiments, the same frequency and time delay offset can be used as in current systems and methods, except that the replica COFDM signal can, for example, consist of only one populated FFT bin.
Abstract:
Methods and apparatus are presented to allow one receiver architecture to be used for the reception of two different SDARS signals, such as, for example, one signal from XM Satellite Radio, the other signal from Sirius Satellite Radio. The methods and apparatus presented utilize common receiver functions to process each signal, thereby obviating the need to duplicate hardware elements. In exemplary embodiments of the present invention, it can be assumed that both signals will not be received at the same time, thus allowing for considerable hardware reuse and lowering the cost of an interoperable receiver. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.
Abstract:
Systems and methods are presented to improve the performance of a constant bit rate iterative decoder by providing elastic buffering, while utilizing a relatively simple decoder architecture capable of maintaining a fixed number of iterations of a lower value. An LDPC decoder can be designed, for example, to support less than the maximum possible number of iterations, and can, for example, be mated to elastic input and output buffers. If a given code block, or succession of code blocks, requires the maximum number of iterations for decoding, the decoder can, for example, run at such maximum number of iterations and the elastic input buffer can, for example, hold code blocks waiting to be processed so as to maintain a constant input rate. Alternatively, if one or more code blocks requires less than the nominal number of iterations, the output buffer can store those code blocks so as to preserve a constant output rate. It is emphasized that this abstract is provided to comply with the rules requiring an abstract, and is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.
Abstract:
Systems and methods are presented for digital antenna diversity combining. In exemplary embodiments of the present invention, at least two antenna signal paths can be communicably connected to a receiver. Each antenna signal path can be provided with an RF tuner communicably connected to a demodulator, which can estimate the signal to noise ratio (SNR) and time of arrival of its respective antenna signal. In exemplary embodiments of the present invention, a time alignment circuit can be communicably connected to each antenna signal path, and a maximum ratio combiner can be communicably connected to the time alignment circuit. In operation, the time alignment circuit can use the time of arrival estimate to align the multiple signals and the maximum ratio combiner can use the SNR estimate obtained for each antenna signal to respectively weight each signal and thereby generate a combined output signal. In exemplary embodiments of the present invention, a switch diversity combiner can be further provided, and can quickly detect when an antenna signal is entering a fade, allowing the maximum ratio combiner to set that signal's weight to zero. In exemplary embodiments of the present invention, a digital diversity combiner can be provided in a stand alone integrated circuit, or can be integrated in a larger integrated circuit, such as, for example, a satellite radio overlay processor.