Face Detector Training Method, Face Detection Method, and Apparatuses
    31.
    发明申请
    Face Detector Training Method, Face Detection Method, and Apparatuses 有权
    面部检测器训练方法,人脸检测方法和装置

    公开(公告)号:US20150235074A1

    公开(公告)日:2015-08-20

    申请号:US14623106

    申请日:2015-02-16

    Abstract: A face detector training method, a face detection method, and apparatuses are provided. In the present invention, during a training phase, a flexible block based local binary pattern feature and a corresponding second classifier are constructed, appropriate second classifiers are searched for to generate multiple first classifiers, and multiple layers of first classifiers that are obtained by using a cascading method form a final face detector; and during a detection phase, face detection is performed on a to-be-detected image by using a first classifier or a face detector that is learned during a training process, so that a face is differentiated from a non-face, and a face detection result is combined and output.

    Abstract translation: 提供了面部检测器训练方法,面部检测方法和装置。 在本发明中,在训练阶段期间,构建基于灵活块的局部二进制模式特征和对应的第二分类器,搜索合适的第二分类器以生成多个第一分类器,并且通过使用 级联方法形成最终的面部检测器; 并且在检测阶段期间,通过使用在训练处理期间学习的第一分类器或面部检测器对待检测图像执行面部检测,使得脸部与非脸部区分开,并且脸部 检测结果合并输出。

    Computer system for configuring a clock
    32.
    发明授权
    Computer system for configuring a clock 有权
    用于配置时钟的计算机系统

    公开(公告)号:US09026835B2

    公开(公告)日:2015-05-05

    申请号:US13717205

    申请日:2012-12-17

    CPC classification number: G06F1/04 G06F1/12 G06F11/1604 G06F11/20

    Abstract: The present invention relates to a computer system and a clock configuring method. The computer system comprises at least two nodes, wherein each of the at least two nodes includes a selecting module and a CPU, inputs to the selecting module of any node comprise a clock of the node and a clock output from other node, and an output terminal of the selecting module is connected to the CPU and an input terminal of the selecting module of other node; the computer system further comprises a clock controlling module, whose output terminal is connected to a control terminal of the selecting module to control the clocks of the at least two nodes to be the same clock. When clocks of plural nodes are abnormal, the computer system can still normally operate as long as there is a normal clock in the computer system.

    Abstract translation: 计算机系统和时钟配置方法技术领域本发明涉及计算机系统和时钟配置方法。 计算机系统包括至少两个节点,其中至少两个节点中的每一个包括选择模块和CPU,任何节点的选择模块的输入包括节点的时钟和来自其他节点的时钟输出,以及输出 选择模块的终端连接到CPU和其他节点的选择模块的输入端; 计算机系统还包括时钟控制模块,其输出端连接到选择模块的控制端,以控制至少两个节点的时钟为相同的时钟。 当多个节点的时钟异常时,只要计算机系统中有正常的时钟,计算机系统仍然可以正常运行。

    METHOD AND APPARATUS FOR IMPLEMENTING COMPATIBLITY OF DIFFERENT PROCESSORS
    33.
    发明申请
    METHOD AND APPARATUS FOR IMPLEMENTING COMPATIBLITY OF DIFFERENT PROCESSORS 有权
    实现不同处理器兼容性的方法和装置

    公开(公告)号:US20130080752A1

    公开(公告)日:2013-03-28

    申请号:US13624415

    申请日:2012-09-21

    CPC classification number: G06F9/4403

    Abstract: A method and an apparatus for implementing compatibility of different processors are provided. The method includes: in a standby state of a board, obtaining configuration information and a type of a processor on the board; and if a processor type in the configuration information is different from the type of the processor, updating, according to the processor, a parameter that is relevant to the processor and is in the configuration information, and changing FLASH memory chip selection configuration in order to connect the connector to a FLASH memory for storing a BIOS program of the processor.

    Abstract translation: 提供了一种用于实现不同处理器的兼容性的方法和装置。 该方法包括:在板的待机状态下,获取板上的配置信息和处理器的类型; 并且如果配置信息中的处理器类型与处理器的类型不同,则根据处理器更新与处理器相关并处于配置信息中的参数,并且改变闪存芯片选择配置以便 将连接器连接到FLASH存储器,用于存储处理器的BIOS程序。

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