CLOCK PHASE SHIFT DETECTOR
    31.
    发明申请
    CLOCK PHASE SHIFT DETECTOR 有权
    时钟相移检测器

    公开(公告)号:US20140159775A1

    公开(公告)日:2014-06-12

    申请号:US14156795

    申请日:2014-01-16

    CPC classification number: H03K5/00 H03L7/087

    Abstract: A clock phase shift detector circuit may include a phase detector that receives a first and a second clock signal, whereby the phase detector generates a phase signal based on a phase difference between the first and the second clock signal. A first integrator is coupled to the phase detector, receives the phase signal, and generates an integrated phase signal. A second integrator receives the first clock signal and generates an integrated first clock signal. A comparator is coupled to the first and the second integrator, whereby the comparator receives the integrated phase signal and the integrated first clock signal. The comparator may then generate a control signal that detects a change between the phase difference of the first and the second clock signal and an optimized phase difference based on an amplitude comparison between the integrated phase signal and the integrated first clock signal.

    Abstract translation: 时钟相移检测器电路可以包括接收第一和第二时钟信号的相位检测器,由此相位检测器基于第一和第二时钟信号之间的相位差产生相位信号。 第一积分器耦合到相位检测器,接收相位信号,并产生积分相位信号。 第二积分器接收第一时钟信号并产生积分的第一时钟信号。 比较器耦合到第一和第二积分器,由此比较器接收积分相位信号和集成的第一时钟信号。 然后,比较器可以产生控制信号,该控制信号基于积分相位信号和集成的第一时钟信号之间的幅度比较来检测第一和第二时钟信号的相位差与优化的相位差之间的变化。

    Clock phase shift detector
    32.
    发明授权
    Clock phase shift detector 失效
    时钟相移检测器

    公开(公告)号:US08638124B1

    公开(公告)日:2014-01-28

    申请号:US13707748

    申请日:2012-12-07

    Abstract: A clock phase shift detector circuit may include a phase detector for generating a phase signal based on a phase difference between first and second clock signals. A current mirror having a first, a second, and a third integrator may be coupled to the phase detector, whereby the first integrator integrates the first clock signal and generates a first voltage, the second integrator integrates the first clock signal and generates a second voltage, and the third integrator integrates the phase signal and generates a third voltage. A first comparator receives the first and the third voltage, and generates a first control signal. A second comparator receives the second and the third voltage, and generates a second control signal. The first and second control signals may detect a change between the phase difference of the first and the second clock signal and an optimized phase difference.

    Abstract translation: 时钟相移检测器电路可以包括相位检测器,用于基于第一和第二时钟信号之间的相位差产生相位信号。 具有第一,第二和第三积分器的电流镜可以耦合到相位检测器,由此第一积分器对第一时钟信号进行积分并产生第一电压,第二积分器对第一时钟信号进行积分并产生第二电压 并且第三积分器对相位信号进行积分并产生第三电压。 第一比较器接收第一和第三电压,并产生第一控制信号。 第二比较器接收第二和第三电压,并产生第二控制信号。 第一和第二控制信号可以检测第一和第二时钟信号的相位差和优化的相位差之间的变化。

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