Solid-state color imaging apparatus for extended definition television
(EDTV)
    31.
    发明授权
    Solid-state color imaging apparatus for extended definition television (EDTV) 失效
    用于扩展清晰度电视(EDTV)的固态彩色成像装置

    公开(公告)号:US4903122A

    公开(公告)日:1990-02-20

    申请号:US142919

    申请日:1988-01-12

    IPC分类号: H04N9/04

    CPC分类号: H04N9/045

    摘要: A high resolution solid-state color imaging apparatus having two-dimensionally disposed photoelectric sensors are arranged in rows and columns each having a color spectral responsivity characteristic such as by employing color filters. Each of the photoelectric sensors is scanned so as to obtain an intensity signal with respect to each row of each field, and wherein scanning of each field is for the same number of rows as that of each frame. Intensity signals are obtained only by the scanned output of each row. Additional intensity signals equal to half the number of said first mentioned intensity signals are obtained by a 2:1 subsampling of bandwidth-restricted signals by a filter along the vertical temporal frequency, thereby realizing high vertical resolution by the photoelectric image sensors of conventional row numbers and having compatibility with a conventional NTSC system and, furthermore, eliminating aliasing distortion.

    摘要翻译: 具有二维设置的光电传感器的高分辨率固体彩色成像装置以各种具有色谱响应特性的行和列布置,例如通过使用滤色器。 每个光电传感器被扫描以获得相对于每个场的每一行的强度信号,并且其中每个场的扫描是与每个帧相同数量的行。 强度信号仅通过每行的扫描输出获得。 通过沿着垂直时间频率的滤波器对带宽限制信号进行2:1的子采样来获得等于所述第一提到的强度信号数量的一半的附加强度信号,从而通过常规行号的光电图像传感器实现高垂直分辨率 并且具有与常规NTSC系统的兼容性,并且还消除了混叠失真。

    Solid-state imaging device
    33.
    发明授权
    Solid-state imaging device 失效
    固态成像装置

    公开(公告)号:US4155094A

    公开(公告)日:1979-05-15

    申请号:US837709

    申请日:1977-09-29

    CPC分类号: H01L31/113 H01L27/14643

    摘要: In a semiconductor photoelectric device comprising a plurality of photodiodes, MOS transistor switches and signal output means which are provided on a semiconductor substrate, a solid-state imaging device characterized in that said each photodiode is constructed of a PN-junction diode and an MIS or MOS diode. Means are provided for permitting incident light to fall on only the PN-junction diode.

    摘要翻译: 在包括设置在半导体衬底上的多个光电二极管,MOS晶体管开关和信号输出装置的半导体光电装置中,固态成像装置的特征在于,所述每个光电二极管由PN结二极管和MIS构成, MOS二极管。 提供了允许入射光仅落在PN结二极管上的装置。

    Solid-state imaging device having an amplifying means in the matrix
arrangement of picture elements
    34.
    发明授权
    Solid-state imaging device having an amplifying means in the matrix arrangement of picture elements 失效
    具有在像素的矩阵排列中的放大装置的固态成像装置

    公开(公告)号:US4809075A

    公开(公告)日:1989-02-28

    申请号:US109319

    申请日:1987-10-19

    摘要: A solid-state imaging device is constructed by integrating a plurality of face plate elements of an imager in the shape of a matrix on a semiconductor substrate. The face plate elements are formed of photodiodes, in which charges corresponding to incident light are accumulated. The charges are converted into currents or voltages by a plurality of amplifying means disposed in the matrix and which are provided adjacent to the photodiodes. The currents or the voltages obtained through conversion are delivered out of the matrix through signal lines. To the signal lines a correlated double sampling circuit is connected, and this curcuit detects a difference in outputs of the amplifying means between a case when the charges of the photodiodes are not present in the input portions of the amplifying means and a case when they are present therein.

    摘要翻译: 固态成像装置通过在半导体衬底上集成成像器形状的成像器的多个面板元件而构成。 面板元件由光电二极管形成,其中对应于入射光的电荷被累积。 通过设置在矩阵中并与光电二极管相邻设置的多个放大装置将电荷转换成电流或电压。 通过转换获得的电流或电压通过信号线传送出矩阵。 对于信号线,连接相关的双采样电路,并且该电路在放大装置的输入部分中不存在光电二极管的电荷的情况与它们之间的情况下检测放大装置的输出的差异 在其中存在。

    Logic LSI
    36.
    发明授权
    Logic LSI 失效
    逻辑LSI

    公开(公告)号:US5585750A

    公开(公告)日:1996-12-17

    申请号:US478403

    申请日:1995-06-07

    摘要: A logic LSI has a plurality of modules such as a CPU contained in one chip. Frequency changing conditions, signals for designating modules whose frequencies are changed for each frequency changing condition, and signals for designating frequencies to be changed are stored in a storage device of a frequency controller, software-wise. The sequentially-input status of the logic LSI is compared with the stored frequency changing conditions and, when the former conforms to the latter, a signal for changing the corresponding frequency is applied to each of the plurality of modules. Each of the modules generates a plurality of internal clocks in synchronization with the basic clock and selects one out of the internal clocks according to the frequency changing signal.

    摘要翻译: 逻辑LSI具有包含在一个芯片中的诸如CPU的多个模块。 频率变化条件,用于为每个频率变化条件改变频率的指定模块的信号和用于指定要改变的频率的信号被存储在频率控制器的存储装置中。 将逻辑LSI的顺序输入状态与存储的频率变化条件进行比较,并且当前者符合后者时,将用于改变相应频率的信号应用于多个模块中的每一个。 每个模块与基本时钟同步地产生多个内部时钟,并根据频率变化信号选择一个内部时钟。

    High speed digital signal processor capable of achieving realtime
operation
    37.
    发明授权
    High speed digital signal processor capable of achieving realtime operation 失效
    能实现实时操作的高速数字信号处理器

    公开(公告)号:US4945506A

    公开(公告)日:1990-07-31

    申请号:US324830

    申请日:1989-03-17

    IPC分类号: G06F17/10 G06F17/16

    CPC分类号: G06F17/16

    摘要: A digital signal processor for computing a vector product between a column vector input signal including a plurality of data items (x0, x1, x2, . . . , x7) and a matrix including a predetermined number of coefficient data items so as to produce a column vector output signal including a plurality of data items (y0, y1, y2, . . . , y7). In a first cycle, the leading data x0 of the column vector input signal is stored in a first store unit (Rin), whereas during this period of time, in a second cycle shorter in time than the first cycle, the data items (c0, c1, c2, . . . , c7) in the row direction constituting a first portion of the matrix are sequentially read out such that both data items are multiplied, thereby storing the multiplication results in an accumulator. A similar data processing is repeatedly executed so as to obtain, based on the outputs from the accumulator, a column vector output signal constituted by the plurality of data items (y0, y1, y2, . . . , y7).

    摘要翻译: 一种数字信号处理器,用于在包括多个数据项(x0,x1,x2,...,x7)的列向量输入信号和包括预定数量的系数数据项的矩阵之间计算矢量积,以便产生 列向量输出信号包括多个数据项(y0,y1,y2,...,y7)。 在第一周期中,列向量输入信号的前导数据x0存储在第一存储单元(Rin)中,而在该时间段内,在比第一周期更短的第二周期中,数据项(c0 顺序地读取构成矩阵的第一部分的行方向的c1,c1,c2,...,c7),使得两个数据项被相乘,从而将乘法结果存储在累加器中。 重复执行类似的数据处理,以便基于来自累加器的输出,获得由多个数据项(y0,y1,y2,...,y7)构成的列向量输出信号。