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31.
公开(公告)号:US08242576B2
公开(公告)日:2012-08-14
申请号:US11186581
申请日:2005-07-21
申请人: Jian-Hong Lin , Kang-Cheng Lin , Tzu-Li Lee
发明人: Jian-Hong Lin , Kang-Cheng Lin , Tzu-Li Lee
IPC分类号: H01L23/52
CPC分类号: H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor structure prevents energy that is used to blow a fuse from causing damage. The semiconductor structure includes a device, guard ring, and at least one protection layer. The device is constructed on the semiconductor substrate underneath the fuse. The seal ring, which surrounds the fuse, is constructed on at least one metal layer between the device and the fuse for confining the energy therein. The protection layer is formed within the seal ring, on at least one metal layer between the device and the fuse for shielding the device from being directly exposed to the energy.
摘要翻译: 半导体结构防止用于熔断保险丝的能量造成损坏。 半导体结构包括器件,保护环和至少一个保护层。 该器件构造在保险丝下方的半导体衬底上。 围绕熔丝的密封环构造在设备和保险丝之间的至少一个金属层上,以将能量限制在其中。 保护层形成在密封环内,在设备和保险丝之间的至少一个金属层上,用于屏蔽器件不会直接暴露于能量。
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公开(公告)号:US20110001194A1
公开(公告)日:2011-01-06
申请号:US12883241
申请日:2010-09-16
申请人: Yong-Tian Hou , Peng-Fu Hsu , Jin Ying , Kang-Cheng Lin , K. T. Huang , Tze-Liang Lee
发明人: Yong-Tian Hou , Peng-Fu Hsu , Jin Ying , Kang-Cheng Lin , K. T. Huang , Tze-Liang Lee
IPC分类号: H01L27/092
CPC分类号: H01L21/823842 , H01L21/28044 , H01L21/28088 , H01L21/823835 , H01L29/66545 , H01L29/6656 , H01L29/7833 , H01L29/7843
摘要: A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a first MOS device of a first conductivity type and a second MOS device of a second conductivity type opposite the first conductivity type. The first MOS device includes a first gate dielectric on a semiconductor substrate; a first metal-containing gate electrode layer over the first gate dielectric; and a silicide layer over the first metal-containing gate electrode layer. The second MOS device includes a second gate dielectric on the semiconductor substrate; a second metal-containing gate electrode layer over the second gate dielectric; and a contact etch stop layer having a portion over the second metal-containing gate electrode layer, wherein a region between the portion of the contact etch stop layer and the second metal-containing gate electrode layer is substantially free from silicon.
摘要翻译: 提供半导体结构及其形成方法。 半导体结构包括第一导电类型的第一MOS器件和与第一导电类型相反的第二导电类型的第二MOS器件。 第一MOS器件包括在半导体衬底上的第一栅极电介质; 在所述第一栅极电介质上的第一含金属的栅电极层; 以及位于第一含金属栅电极层上的硅化物层。 第二MOS器件包括半导体衬底上的第二栅极电介质; 在所述第二栅极电介质上方的第二含金属的栅电极层; 以及具有位于所述第二含金属栅电极层上的部分的接触蚀刻停止层,其中所述接触蚀刻停止层的所述部分和所述第二含金属栅电极层之间的区域基本上不含硅。
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公开(公告)号:US07667289B2
公开(公告)日:2010-02-23
申请号:US11091508
申请日:2005-03-29
申请人: Jian-Hong Lin , Kang-Cheng Lin
发明人: Jian-Hong Lin , Kang-Cheng Lin
IPC分类号: H01L21/326
CPC分类号: H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要: A laser fuse structure for a semiconductor device, the laser fuse structure having an array of laser fuses wherein one or more of the fuses in the array have a tortuous fuse line extending between first and second connectors that connect the fuse to an underlying circuit area.
摘要翻译: 一种用于半导体器件的激光熔丝结构,所述激光熔丝结构具有激光熔丝阵列,其中阵列中的一个或多个熔丝具有在将熔丝连接到下面的电路区域的第一和第二连接器之间延伸的曲折熔丝。
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公开(公告)号:US06861754B2
公开(公告)日:2005-03-01
申请号:US10628040
申请日:2003-07-25
申请人: Kang-Cheng Lin , Tien-I Bao
发明人: Kang-Cheng Lin , Tien-I Bao
CPC分类号: H01L23/564 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor package seal ring including a plurality of insulating layers, a plurality of conductive runners each embedded in one of the insulating layers, and a plurality of conductive posts each contacting one of the conductive runners and extending through at least one of the insulating layers and at least partially through an opening in another one of the conductive runners.
摘要翻译: 一种半导体封装密封环,包括多个绝缘层,多个导电流道,每个绝缘层嵌入在一个绝缘层中,以及多个导电柱,每个导电柱均接触导电流道中的一个并延伸穿过至少一个绝缘层, 至少部分地通过另一个导电流道中的开口。
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公开(公告)号:US20050017363A1
公开(公告)日:2005-01-27
申请号:US10628040
申请日:2003-07-25
申请人: Kang-Cheng Lin , Tien-I Bao
发明人: Kang-Cheng Lin , Tien-I Bao
CPC分类号: H01L23/564 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor package seal ring including a plurality of insulating layers, a plurality of conductive runners each embedded in one of the insulating layers, and a plurality of conductive posts each contacting one of the conductive runners and extending through at least one of the insulating layers and at least partially through an opening in another one of the conductive runners.
摘要翻译: 一种半导体封装密封环,包括多个绝缘层,多个导电流道,每个绝缘层嵌入在一个绝缘层中,以及多个导电柱,每个导电柱均接触导电流道中的一个并延伸穿过至少一个绝缘层, 至少部分地通过另一个导电流道中的开口。
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公开(公告)号:US06316357B1
公开(公告)日:2001-11-13
申请号:US08947381
申请日:1997-10-08
申请人: Kang-Cheng Lin , Hong-Woei Wu
发明人: Kang-Cheng Lin , Hong-Woei Wu
IPC分类号: H01L2128
CPC分类号: H01L29/665 , H01L21/268 , H01L29/4933
摘要: The present invention discloses a method for forming metal silicide on an electronic structure by first depositing a metal layer on top of a silicon layer of polysilicon, single crystal silicon or amorphous silicon capable of forming a metal silicide, and then irradiating the metal layer with laser energy for a sufficient length of time such that a layer of metal silicide is formed at the metal interface with polysilicon, single crystal silicon and amorphous silicon. The unreacted metal layer on the metal silicide is then removed by a wet dipping method by selecting a suitable etchant for the metal. The present invention novel method can be applied to various metallic materials such as Ti, Co, W, Pt, Hf, Ta, Mo, Pd and Cr. The laser source utilized is a pulse Excimer laser of XeCl, ArF or XeF.
摘要翻译: 本发明公开了一种在电子结构上形成金属硅化物的方法,首先在多晶硅硅单晶硅或能形成金属硅化物的非晶硅之上沉积金属层,然后用激光照射金属层 能量足够长的时间,使得在与多晶硅,单晶硅和非晶硅的金属界面处形成金属硅化物层。 然后通过选择合适的金属蚀刻剂,通过湿式浸渍法除去金属硅化物上的未反应的金属层。 本发明新颖的方法可应用于Ti,Co,W,Pt,Hf,Ta,Mo,Pd和Cr等各种金属材料。 所使用的激光源是XeCl,ArF或XeF的脉冲准分子激光器。
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37.
公开(公告)号:US6018166A
公开(公告)日:2000-01-25
申请号:US124680
申请日:1998-07-30
申请人: Kang-Cheng Lin , Hong-Jye Hong
发明人: Kang-Cheng Lin , Hong-Jye Hong
IPC分类号: H01L21/336 , H01L29/786 , H01L21/84 , H01L29/167
CPC分类号: H01L29/66765 , H01L29/78618
摘要: The present invention includes forming a conductive layer on a substrate. Portions of the conductive layer are removed using a first photoresist layer as a mask. A first oxide layer is formed over the conductive layer and the substrate, and an amorphous silicon layer is then formed on the first oxide layer. After annealing the amorphous silicon layer, thereby transforming amorphous silicon layer to a polysilicon layer, a second oxide layer is formed on the polysilicon layer. The second oxide layer is removed using a second photoresist layer as a mask. An amorphous silicon carbon layer is formed over the second oxide layer and the polysilicon layer, and a heavily-doped amorphous silicon carbon layer is formed on the amorphous silicon carbon layer. After annealing the heavily-doped amorphous silicon carbon layer and the amorphous silicon carbon layer, thereby transforming the heavily-doped amorphous silicon carbon layer to a heavily-doped polysilicon carbon layer, and transforming the amorphous silicon carbon layer to a polysilicon carbon layer, portions of the polysilicon carbon layer, the heavily-doped polysilicon carbon layer and the polysilicon layer are removed using a third photoresist layer as a mask.
摘要翻译: 本发明包括在基板上形成导电层。 使用第一光致抗蚀剂层作为掩模去除部分导电层。 在导电层和基板上形成第一氧化物层,然后在第一氧化物层上形成非晶硅层。 在非晶硅层退火之后,将非晶硅层转化为多晶硅层,在多晶硅层上形成第二氧化物层。 使用第二光致抗蚀剂层作为掩模去除第二氧化物层。 在第二氧化物层和多晶硅层上形成非晶硅碳层,在非晶硅碳层上形成重掺杂的非晶硅碳层。 在重掺杂非晶硅碳层和非晶硅碳层退火之后,将重掺杂非晶硅碳层转化为重掺杂多晶硅碳层,并将非晶硅碳层转化为多晶碳层, 的多晶硅碳层,使用第三光致抗蚀剂层作为掩模去除重掺杂多晶硅碳层和多晶硅层。
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公开(公告)号:US20110117734A1
公开(公告)日:2011-05-19
申请号:US13014548
申请日:2011-01-26
申请人: Da-Yuan Lee , Chien-Hao Huang , Chi-Chun Chen , Kang-Cheng Lin
发明人: Da-Yuan Lee , Chien-Hao Huang , Chi-Chun Chen , Kang-Cheng Lin
IPC分类号: H01L21/28
CPC分类号: H01L29/513 , H01L21/823828 , H01L29/4966 , H01L29/518
摘要: The present disclosure provides a semiconductor device that includes a semiconductor substrate, and a transistor formed in the substrate. The transistor has a gate structure that includes an interfacial layer formed on the substrate, a high-k dielectric layer formed on the interfacial layer, a capping layer formed on the high-k dielectric layer, the capping layer including a silicon oxide, silicon oxynitride, silicon nitride, or combinations thereof, and a polysilicon layer formed on the capping layer.
摘要翻译: 本公开提供了一种半导体器件,其包括半导体衬底和形成在衬底中的晶体管。 晶体管具有栅极结构,该栅极结构包括形成在衬底上的界面层,形成在界面层上的高k电介质层,形成在高k电介质层上的覆盖层,覆盖层包括氧化硅,氮氧化硅 ,氮化硅或其组合,以及形成在覆盖层上的多晶硅层。
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公开(公告)号:US20080173947A1
公开(公告)日:2008-07-24
申请号:US11656711
申请日:2007-01-23
申请人: Yong-Tian Hou , Peng-Fu Hsu , Jin Ying , Kang-Cheng Lin , K. T. Huang , Tze-Liang Lee
发明人: Yong-Tian Hou , Peng-Fu Hsu , Jin Ying , Kang-Cheng Lin , K. T. Huang , Tze-Liang Lee
IPC分类号: H01L27/092
CPC分类号: H01L21/823842 , H01L21/28044 , H01L21/28088 , H01L21/823835 , H01L29/66545 , H01L29/6656 , H01L29/7833 , H01L29/7843
摘要: A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a first MOS device of a first conductivity type and a second MOS device of a second conductivity type opposite the first conductivity type. The first MOS device includes a first gate dielectric on a semiconductor substrate; a first metal-containing gate electrode layer over the first gate dielectric; and a silicide layer over the first metal-containing gate electrode layer. The second MOS device includes a second gate dielectric on the semiconductor substrate; a second metal-containing gate electrode layer over the second gate dielectric; and a contact etch stop layer having a portion over the second metal-containing gate electrode layer, wherein a region between the portion of the contact etch stop layer and the second metal-containing gate electrode layer is substantially free from silicon.
摘要翻译: 提供半导体结构及其形成方法。 半导体结构包括第一导电类型的第一MOS器件和与第一导电类型相反的第二导电类型的第二MOS器件。 第一MOS器件包括在半导体衬底上的第一栅极电介质; 在所述第一栅极电介质上的第一含金属的栅电极层; 以及位于第一含金属栅电极层上的硅化物层。 第二MOS器件包括半导体衬底上的第二栅极电介质; 在所述第二栅极电介质上方的第二含金属的栅电极层; 以及具有位于所述第二含金属栅电极层上的部分的接触蚀刻停止层,其中所述接触蚀刻停止层的所述部分和所述第二含金属栅电极层之间的区域基本上不含硅。
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40.
公开(公告)号:US20070018279A1
公开(公告)日:2007-01-25
申请号:US11186581
申请日:2005-07-21
申请人: Jian-Hong Lin , Kang-Cheng Lin , Tzu-Li Lee
发明人: Jian-Hong Lin , Kang-Cheng Lin , Tzu-Li Lee
IPC分类号: H01L29/00
CPC分类号: H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor structure prevents energy that is used to blow a fuse from causing damage. The semiconductor structure includes a device, guard ring, and at least one protection layer. The device is constructed on the semiconductor substrate underneath the fuse. The seal ring, which surrounds the fuse, is constructed on at least one metal layer between the device and the fuse for confining the energy therein. The protection layer is formed within the seal ring, on at least one metal layer between the device and the fuse for shielding the device from being directly exposed to the energy.
摘要翻译: 半导体结构防止用于熔断保险丝的能量造成损坏。 半导体结构包括器件,保护环和至少一个保护层。 该器件构造在保险丝下方的半导体衬底上。 围绕熔丝的密封环构造在设备和保险丝之间的至少一个金属层上,以将能量限制在其中。 保护层形成在密封环内,在设备和保险丝之间的至少一个金属层上,用于屏蔽器件不会直接暴露于能量。
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