公开(公告)号：US20090120367A1

公开(公告)日：2009-05-14

申请号：US11985579

申请日：2007-11-14

申请人： Peter I. Porshnev ,  Majeed A. Foad ,  Kartik Ramaswamy ,  Biagio Gallo ,  Hiroji Hanawa ,  Andrew Nguyen ,  Kenneth S. Collins ,  Amir Al-Bayati

发明人： Peter I. Porshnev ,  Majeed A. Foad ,  Kartik Ramaswamy ,  Biagio Gallo ,  Hiroji Hanawa ,  Andrew Nguyen ,  Kenneth S. Collins ,  Amir Al-Bayati

IPC分类号： C23C16/513

CPC分类号： H01J37/32642 ,  H01J37/32412

摘要： The disclosure concerns a process ring for the wafer support pedestal of a toroidal source plasma immersion ion implantation reactor. The process ring improves edge uniformity by providing a continuous surface extending beyond the wafer edge, in one embodiment. In another embodiment, the process ring includes a floating electrode that functions as an extension of the wafer support electrode by RF coupling at the bias frequency.

摘要翻译： 本公开涉及用于环形源等离子体浸入式离子注入反应器的晶片支撑基座的工艺环。 在一个实施例中，处理环通过提供延伸超过晶片边缘的连续表面来提高边缘均匀性。 在另一个实施例中，处理环包括浮动电极，其通过在偏置频率下的RF耦合用作晶片支撑电极的延伸。

公开(公告)号：US07291545B2

公开(公告)日：2007-11-06

申请号：US11284975

申请日：2005-11-21

申请人： Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo ,  Gonzalo Antonio Monroy

发明人： Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo ,  Gonzalo Antonio Monroy

IPC分类号： H01L21/04

CPC分类号： H01J37/32357 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32412 ,  H01L21/2236

摘要： A method of ion implanting a species in a workpiece to a selected ion implantation profile depth includes placing a workpiece having a semiconductor material on an electrostatic chuck in or near a processing region of a plasma reactor chamber and applying a chucking voltage to the electrostatic chuck. The method further includes introducing into the chamber a precursor gas including a species to be ion implanted in the workpiece and applying an RF bias to the electrostatic chuck, the RF bias having a bias level corresponding to the ion implantation profile depth.

摘要翻译： 将工件中的物质离子注入到选定的离子注入轮廓深度的方法包括将具有半导体材料的工件放置在等离子体反应器室的处理区域中或其附近的静电卡盘上，并向静电卡盘施加夹持电压。 所述方法还包括将包括要离子植入的物质的前体气体引入所述室中并将RF偏压施加到所述静电卡盘，所述RF偏压具有对应于所述离子注入轮廓深度的偏置电平。

公开(公告)号：US07183177B2

公开(公告)日：2007-02-27

申请号：US10989993

申请日：2004-11-16

申请人： Amir Al-Bayati ,  Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

发明人： Amir Al-Bayati ,  Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

IPC分类号： H01L21/46 ,  H01L21/30

CPC分类号： H01L21/76254 ,  C23C14/48 ,  C23C16/507 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32357 ,  H01J37/32412 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/31604 ,  H01L21/318 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L29/6659

摘要： A method of fabricating a semiconductor-on-insulator structure from a pair of semiconductor wafers, includes forming an oxide layer on at least a first surface of a first one of the wafers and performing a bonding enhancement implantation step by ion implantation of a first species in the first surface of at least either of the pair of wafers. The method further includes performing a cleavage ion implantation step on one of the pair of wafers by ion implanting a second species to define a cleavage plane across a diameter of the wafer at the predetermined depth below the top surface of the one wafer. The wafers are then bonded together by placing the first surfaces of the pair of wafers onto one another so as to form an semiconductor-on-insulator structure. The method also includes separating the one wafer along the cleavage plane so as to remove a portion of the one wafer between the second surface and the cleavage plane, whereby to form an exposed cleaved surface of a remaining portion of the one wafer on the semiconductor-on-insulator structure. Finally, the cleaved surface is smoothed, preferably by carrying out a low energy high momentum ion implantation step.

摘要翻译： 一种从一对半导体晶片制造绝缘体上半导体结构的方法包括在第一晶片的至少第一表面上形成氧化物层，并通过离子注入第一种类进行结合增强注入步骤 在所述一对晶片中的至少一个的第一表面中。 所述方法还包括通过离子注入第二种类来在所述一对晶片之一上执行切割离子注入步骤，以在所述晶片的顶部表面下方的预定深度处限定跨所述晶片的直径的解理面。 然后通过将一对晶片的第一表面放置在彼此上而将晶片结合在一起，以形成绝缘体上半导体结构。 该方法还包括沿着解理平面分离一个晶片，以便去除第二表面和解理面之间的一个晶片的一部分，从而形成半导体芯片上的一个晶片的剩余部分的暴露的切割表面， 绝缘体上的结构。 最后，优选通过进行低能量的高动量离子注入步骤来平滑切割的表面。

公开(公告)号：US07166524B2

公开(公告)日：2007-01-23

申请号：US11003000

申请日：2004-12-01

申请人： Amir Al-Bayati ,  Rick J. Roberts ,  Kenneth S. Collins ,  Ken MacWilliams ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

发明人： Amir Al-Bayati ,  Rick J. Roberts ,  Kenneth S. Collins ,  Ken MacWilliams ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

IPC分类号： H01L21/425

CPC分类号： H01J37/32082 ,  H01J37/321 ,  H01L21/76254

摘要： An integrated microelectronic circuit has a multi-layer interconnect structure overlying the transistors consisting of stacked metal pattern layers and insulating layers separating adjacent ones of said metal pattern layers. Each of the insulating layers is a dielectric material with plural gas bubbles distributed within the volume of the dielectric material to reduce the dielectric constant of the material, the gas bubbles being formed by ion implantation of a gaseous species into the dielectric material.

摘要翻译： 集成的微电子电路具有覆盖由堆叠的金属图案层和分离相邻的所述金属图案层的绝缘层的晶体管的多层互连结构。 每个绝缘层是具有分布在电介质材料的体积内的多个气泡的介电材料，以降低材料的介电常数，气泡通过将气态物质离子注入电介质材料而形成。

公开(公告)号：US07137354B2

公开(公告)日：2006-11-21

申请号：US10646458

申请日：2003-08-22

申请人： Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo ,  Gonzalo Antonio Monroy

发明人： Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo ,  Gonzalo Antonio Monroy

IPC分类号： G23C16/00 ,  C23F1/00

CPC分类号： H01J37/32082 ,  H01J37/321

摘要： A plasma immersion ion implantation reactor for ion implanting a species into a surface layer of a workpiece includes an enclosure which has a side wall and a ceiling defining a chamber and a workpiece support pedestal within the chamber having a workpiece support surface facing the ceiling and defining a process region extending generally across the wafer support pedestal and confined laterally by the side wall and axially between the workpiece support pedestal and the ceiling. The enclosure has at least a first pair of openings at generally opposite sides of the process region and a first hollow conduit outside of the chamber having first and second ends connected to respective ones of the first pair of openings, so as to provide a first reentrant path extending through the conduit and across said process region. A gas distribution apparatus is provided on or near an interior surface of the reactor for introducing a process gas containing the species to be ion implanted and a first RE plasma source power applicator for generating a plasma in the chamber.

摘要翻译： 用于将物质离子注入到工件的表面层中的等离子体浸没离子注入反应器包括具有侧壁和限定腔室的天花板的壳体，以及腔室内的工件支撑基座，其具有面向天花板的工件支撑表面并且限定 大致横跨晶片支撑基座延伸并由侧壁横向限制并且在工件支撑基座和天花板之间轴向延伸的过程区域。 外壳在工艺区域的大致相对侧具有至少第一对开口，在腔室外部具有第一和第二端，第一和第二端连接到第一对开口中的相应开口，以便提供第一凹槽 路径延伸穿过导管并穿过所述过程区域。 气体分配装置设置在反应器的内表面上或附近，用于引入含有要离子注入的物质的处理气体和用于在室中产生等离子体的第一RE等离子体源功率施加器。

公开(公告)号：US20080044960A1

公开(公告)日：2008-02-21

申请号：US11901969

申请日：2007-09-18

申请人： Amir Al-Bayati ,  Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

发明人： Amir Al-Bayati ,  Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

IPC分类号： H01L21/84

CPC分类号： H01J37/321 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/7843 ,  H01L29/785 ,  H01L29/78618

摘要： A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.

摘要翻译： 通过绝缘体上半导体结构中的三维垂直晶体管的垂直和水平表面进行保形掺杂的工艺采用RF振荡环形等离子体电流来执行保形离子注入或含掺杂剂膜的共形沉积 然后可以加热以将掺杂剂驱动到晶体管中。 一些实施例采用包含掺杂剂的膜的共形离子注入和共形沉积，并且在其中含掺杂剂的膜是纯掺杂剂的那些实施例中，可以同时执行离子注入和膜沉积。

公开(公告)号：US20050230047A1

公开(公告)日：2005-10-20

申请号：US11046659

申请日：2005-01-28

申请人： Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo

发明人： Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo

IPC分类号： H01J37/32 ,  C23F1/00 ,  H01L21/302

CPC分类号： H01J37/32082 ,  H01J37/321 ,  H01L21/67109 ,  H01L21/6831

摘要： A plasma reactor for performing plasma immersion ion implantation, dopant deposition or surface material enhancement, includes a vacuum chamber, a wafer support pedestal or electrostatic chuck having an insulated electrode underlying a wafer support surface within said chamber, a chucking voltage source coupled to the insulated electrode, a thermal sink coupled to the electrostatic chuck, an RF bias power generator coupled to said electrostatic chuck, and a process gas supply and gas inlet ports coupled to the chamber and coupled to the gas supply. The process gas supply contains either (a) a gas containing a dopant species to be ion implanted in a semiconductive material of workpiece, (b) a gas containing a dopant species to be deposited on a surface of a semiconductive material of a workpiece, or (c) a gas containing a material enhancement species to be ion implanted into a workpiece.

摘要翻译： 用于执行等离子体浸没离子注入，掺杂剂沉积或表面材料增强的等离子体反应器包括真空室，晶片支撑基座或静电卡盘，其具有位于所述腔室内的晶片支撑表面下方的绝缘电极，耦合到绝缘体的夹持电压源 电极，耦合到静电卡盘的散热器，耦合到所述静电卡盘的RF偏置功率发生器，以及耦合到所述腔室并耦合到气体供应的工艺气体供应和气体入口端口。 工艺气体供应包含（a）含有要离子注入工件半导体材料中的掺杂剂物质的气体，（b）含有待沉积在工件的半导体材料表面上的掺杂物质的气体，或 （c）含有将离子注入到工件中的材料增强物质的气体。

公开(公告)号：US20050191830A1

公开(公告)日：2005-09-01

申请号：US11046661

申请日：2005-01-28

申请人： Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo

发明人： Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo

IPC分类号： H01J37/32 ,  H01L21/425

CPC分类号： H01J37/32082 ,  H01J37/321 ,  H01L21/67109 ,  H01L21/6831

摘要： A method of performing plasma immersion ion implantation on a workpiece in a plasma reactor chamber, includes placing the workpiece on a workpiece support in the chamber, controlling a temperature of the wafer support near a constant level; performing plasma immersion ion implantation on the workpiece by introducing an implant species precursor gas into the chamber and generating a plasma while minimizing deposition and minimizing etching by holding the temperature of the workpiece within a temperature range that is above a workpiece deposition threshold temperature and below a workpiece etch threshold temperature.

摘要翻译： 在等离子体反应器室中对工件进行等离子体浸没离子注入的方法包括将工件放置在腔室中的工件支撑件上，将晶片支架的温度控制在恒定水平附近; 通过将注入种类前体气体引入到腔室中并产生等离子体并且通过将工件的温度保持在高于工件沉积阈值温度并低于工件沉积阈值温度的温度范围内来最小化沉积和最小化蚀刻来对工件进行等离子体浸没离子注入 工件蚀刻阈值温度。

公开(公告)号：US20050191827A1

公开(公告)日：2005-09-01

申请号：US11046562

申请日：2005-01-28

申请人： Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo

发明人： Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo

IPC分类号： H01J37/32 ,  H01L21/461 ,  H01L21/302

CPC分类号： H01J37/32082 ,  H01J37/321 ,  H01L21/67109 ,  H01L21/6831

摘要： One method of performing plasma immersion ion implantation on a workpiece in a plasma reactor chamber includes initially depositing a seasoning film on the interior surfaces of the plasma reactor chamber before the workpiece is introduced, by introducing a seasoning film precursor gas into the chamber and generating a plasma within the chamber, performing plasma immersion ion implantation on the workpiece by introducing an implant species precursor gas into the chamber and generating a plasma, and then removing the workpiece from the chamber and removing the seasoning film from the chamber interior surfaces.

摘要翻译： 在等离子体反应器室中的工件上进行等离子体浸没离子注入的一种方法包括：在工件被引入之前，首先在等离子体反应器室的内表面上沉积调味膜，通过将调味膜前体气体引入室中， 在室内的等离子体，通过将注入种类前体气体引入到腔室中并产生等离子体，然后从腔室中移出工件并从室内表面除去调味膜，从而在工件上进行等离子体浸没离子注入。

公开(公告)号：US20070212811A1

公开(公告)日：2007-09-13

申请号：US11788523

申请日：2007-04-19

申请人： Hiroji Hanawa ,  Kartik Ramaswamy ,  Kenneth Collins ,  Amir Al-Bayati ,  Biagio Gallo ,  Andrew Nguyen

发明人： Hiroji Hanawa ,  Kartik Ramaswamy ,  Kenneth Collins ,  Amir Al-Bayati ,  Biagio Gallo ,  Andrew Nguyen

IPC分类号： H01L21/16

CPC分类号： H01L21/02274 ,  C23C14/48 ,  C23C16/507 ,  H01J37/321 ,  H01J37/32174 ,  H01J37/32357 ,  H01J37/32412 ,  H01J2237/2001 ,  H01L21/02126 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/31604 ,  H01L21/318 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L29/6659 ,  Y10T29/5313

摘要： Device-enhancing coatings are deposited on CMOS devices by successively masking with photoresist each one of the sets of N-channel and P-channel devices while unmasking or leaving unmasked the other set, and after each step of successively masking one of the sets of devices, carrying out low temperature CVD steps with a toroidal RF plasma current while applying an RF plasma bias voltage. The temperature of the workpiece is held below a threshold photoresist removal temperature. The RF bias voltage is held at a level at which the coating is deposited with a first stress when the unmasked set consists of the P-channel devices and with a second stress when the unmasked set consists of N-channel devices.

摘要翻译： 通过在每个N沟道和P沟道器件组中的每一个上对光阻单元进行连续掩蔽，同时在CMOS器件上沉积器件增强涂层，同时对另一个器件进行掩蔽或者脱离另一个器件，并且在每个步骤连续地掩蔽器件组中的一个器件 在施加RF等离子体偏压的同时，用环形RF等离子体电流进行低温CVD步骤。 工件的温度保持在阈值光刻胶去除温度以下。 当未屏蔽组由P沟道器件组成并且当未屏蔽组由N沟道器件组成时，RF偏置电压保持在第一应力下沉积涂层的水平。