Interfacing external thread prioritizing policy enforcing logic with customer modifiable register to processor internal scheduler
    31.
    发明授权
    Interfacing external thread prioritizing policy enforcing logic with customer modifiable register to processor internal scheduler 有权
    将外部线程优先处理策略实施逻辑与客户可修改寄存器连接到处理器内部调度程序

    公开(公告)号:US07613904B2

    公开(公告)日:2009-11-03

    申请号:US11051997

    申请日:2005-02-04

    IPC分类号: G06F9/50

    CPC分类号: G06F9/3851

    摘要: A bifurcated instruction scheduler for dispatching instructions of multiple threads concurrently executing in a multithreading processor is provided. The scheduler includes a first portion within a reusable core that is not customizable by a customer, a second portion outside the core that is customizable, and an interface coupling the second portion to the core. The second portion implements a thread scheduling policy that may be customized to the customer's particular application. The first portion may be scheduling policy-agnostic and issues instructions of the threads each clock cycle to execution units based on the scheduling policy communicated by the second portion. The second portion communicates the scheduling policy via a priority for each of the threads. When the core commits an instruction for execution, the core communicates to the second portion which thread the committed instruction is in to enable the second portion to update the priorities in response thereto.

    摘要翻译: 提供了一种用于调度在多线程处理器中并发执行的多个线程的指令的分支指令调度器。 调度器包括不可由客户定制的可重用核心内的第一部分,可定制的核心外部的第二部分以及将第二部分耦合到核心的接口。 第二部分实现可以根据客户的特定应用来定制的线程调度策略。 第一部分可以是调度策略无关的,并且基于由第二部分传送的调度策略,将线程的每个时钟周期的指令周期发送到执行单元。 第二部分通过每个线程的优先级来传送调度策略。 当核心提交执行指令时,核心与提交的指令所线程的第二部分进行通信,以使得第二部分响应于此而更新优先级。