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31.发明授权Method of controlling stress in group-III nitride films deposited on substrates 有权控制沉积在衬底上的III族氮化物膜的应力的方法公开(公告)号：US09129977B2
公开(公告)日：2015-09-08
申请号：US13306763
申请日：2011-11-29
IPC分类号： H01L33/32 , H01L29/267 , H01L23/00 , C30B25/02 , C30B29/40 , H01L21/02 , H01L33/00 , H01L29/20 , H01L29/205 , H01L33/12
CPC分类号： H01L23/562 , C30B25/02 , C30B29/403 , C30B29/406 , H01L21/02378 , H01L21/02381 , H01L21/02458 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L29/2003 , H01L29/205 , H01L33/0025 , H01L33/0066 , H01L33/0075 , H01L33/12 , H01L33/32 , H01L2924/0002 , H01L2924/00
摘要： Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.
摘要翻译： 公开了控制沉积在硅和碳化硅衬底上的GaN膜中的应力控制方法和由其制备的膜。 典型的方法包括提供衬底并在衬底上沉积梯度的氮化镓层，其具有基本上连续等级的从初始组成到由生长室中的至少一种前体的供应形成的最终组成的变化的组成，而不会中断 在供应。 典型的半导体膜包括沉积在衬底上的衬底和梯度的氮化镓层，其具有从初始组成到最终组成的基本连续等级的变化的组成，其由在生长室中供应至少一种前体而形成，而不会中断 在供应。
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32.发明申请N-polar aluminum gallium nitride/gallium nitride enhancement-mode field effect transistor 有权氮化镓氮化镓/氮化镓增强型场效应晶体管公开(公告)号：US20100264461A1
公开(公告)日：2010-10-21
申请号：US11523286
申请日：2006-09-18
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L29/045 , H01L29/2003 , H01L29/432 , H01L29/7781 , H01L29/7783 , H01L29/7784
摘要： A novel enhancement mode field effect transistor (FET), such as a High Electron Mobility Transistors (HEMT), has an N-polar surface uses polarization fields to reduce the electron population under the gate in the N-polar orientation, has improved dispersion suppression, and low gate leakage.
摘要翻译： 一种新型的增强型场效应晶体管（FET），例如高电子迁移率晶体管（HEMT），具有N-极性表面，利用极化场来减小N极方向栅极下的电子群，改善了色散抑制 ，低栅极泄漏。
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33.发明授权N-polar aluminum gallium nitride/gallium nitride enhancement-mode field effect transistor 有权氮化镓氮化镓/氮化镓增强型场效应晶体管公开(公告)号：US07948011B2
公开(公告)日：2011-05-24
申请号：US11523286
申请日：2006-09-18
IPC分类号： H01L29/66
CPC分类号： H01L29/045 , H01L29/2003 , H01L29/432 , H01L29/7781 , H01L29/7783 , H01L29/7784
摘要： A novel enhancement mode field effect transistor (FET), such as a High Electron Mobility Transistors (HEMT), has an N-polar surface uses polarization fields to reduce the electron population under the gate in the N-polar orientation, has improved dispersion suppression, and low gate leakage.
摘要翻译： 一种新型的增强型场效应晶体管（FET），例如高电子迁移率晶体管（HEMT），具有N-极性表面，利用极化场来减小N极方向栅极下的电子群，改善色散抑制 ，低栅极泄漏。
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34.发明授权Field-effect transistor with compositionally graded nitride layer on a silicaon substrate 有权在二氧化硅衬底上具有组成梯度的氮化物层的场效应晶体管公开(公告)号：US08525230B2
公开(公告)日：2013-09-03
申请号：US12901988
申请日：2010-10-11
IPC分类号： H01L29/737
CPC分类号： H01L23/562 , C30B25/02 , C30B29/403 , C30B29/406 , H01L21/02378 , H01L21/02381 , H01L21/02458 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L29/2003 , H01L29/205 , H01L33/0025 , H01L33/0066 , H01L33/0075 , H01L33/12 , H01L33/32 , H01L2924/0002 , H01L2924/00
摘要： A field effect transistor including a compositionally graded group-III nitride layer on a silicon substrate.
摘要翻译： 一种场效应晶体管，包括在硅衬底上的III族氮化物层。
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35.发明申请METHOD OF CONTROLLING STRESS IN GROUP-III NITRIDE FILMS DEPOSITED ON SUBSTRATES 有权控制在基底上沉积的III类氮化物膜中的应力的方法公开(公告)号：US20120068191A1
公开(公告)日：2012-03-22
申请号：US13306763
申请日：2011-11-29
IPC分类号： H01L33/32 , H01L29/267
CPC分类号： H01L23/562 , C30B25/02 , C30B29/403 , C30B29/406 , H01L21/02378 , H01L21/02381 , H01L21/02458 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L29/2003 , H01L29/205 , H01L33/0025 , H01L33/0066 , H01L33/0075 , H01L33/12 , H01L33/32 , H01L2924/0002 , H01L2924/00
摘要： Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.
摘要翻译： 公开了控制沉积在硅和碳化硅衬底上的GaN膜中的应力控制方法和由其制备的膜。 典型的方法包括提供衬底并在衬底上沉积梯度的氮化镓层，其具有基本上连续等级的从初始组成到由生长室中的至少一种前体的供应形成的最终组成的变化的组成，而不会中断 在供应。 典型的半导体膜包括沉积在衬底上的衬底和梯度的氮化镓层，其具有从初始组成到最终组成的基本连续等级的变化的组成，其由在生长室中供应至少一种前体而形成，而不会中断 在供应。
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36.发明申请METHOD OF CONTROLLING STRESS IN GROUP-III NITRIDE FILMS DEPOSITED ON SUBSTRATES 有权控制在基底上沉积的III类氮化物膜中的应力的方法公开(公告)号：US20110108886A1
公开(公告)日：2011-05-12
申请号：US12901988
申请日：2010-10-11
IPC分类号： H01L29/737
CPC分类号： H01L23/562 , C30B25/02 , C30B29/403 , C30B29/406 , H01L21/02378 , H01L21/02381 , H01L21/02458 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L29/2003 , H01L29/205 , H01L33/0025 , H01L33/0066 , H01L33/0075 , H01L33/12 , H01L33/32 , H01L2924/0002 , H01L2924/00
摘要： Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.
摘要翻译： 公开了控制沉积在硅和碳化硅衬底上的GaN膜中的应力控制方法和由其制备的膜。 典型的方法包括提供衬底并在衬底上沉积梯度的氮化镓层，其具有基本上连续等级的从初始组成到由生长室中的至少一种前体的供应形成的最终组成的变化的组成，而不会中断 在供应。 典型的半导体膜包括沉积在衬底上的衬底和梯度的氮化镓层，其具有从初始组成到最终组成的基本连续等级的变化的组成，其由在生长室中供应至少一种前体而形成，而不会中断 在供应。
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37.发明授权N-face high electron mobility transistors with low buffer leakage and low parasitic resistance 有权具有低缓冲器泄漏和低寄生电阻的N面高电子迁移率晶体管公开(公告)号：US07935985B2
公开(公告)日：2011-05-03
申请号：US12059902
申请日：2008-03-31
申请人： Umesh K. Mishra , Yi Pei , Siddharth Rajan , Man Hoi Wong
发明人： Umesh K. Mishra , Yi Pei , Siddharth Rajan , Man Hoi Wong
IPC分类号： H01L29/66
CPC分类号： H01L29/7786 , H01L21/02378 , H01L21/02433 , H01L21/02458 , H01L21/02516 , H01L21/0254 , H01L29/0891 , H01L29/1608 , H01L29/2003
摘要： A method for fabricating nitrogen-face (N-face) nitride-based electronic devices with low buffer leakage, comprising isolating a buffer from a substrate with an AlGaInN nucleation layer to suppress impurity incorporation from the substrate into the buffer. A method for fabricating N-face nitride-based electronic devices with low parasitic resistance and high breakdown, comprising capping a device structure with a conductive layer to provide extremely low access and/or contact resistances, is also disclosed.
摘要翻译： 一种用于制造具有低缓冲器泄漏的氮面（N面）氮化物基电子器件的方法，包括用AlGaInN成核层从衬底隔离缓冲器以抑制从衬底掺入缓冲器中的杂质。 还公开了一种用于制造具有低寄生电阻和高击穿的N面氮化物基电子器件的方法，其包括用导电层封装器件结构以提供极低的访问和/或接触电阻。
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公开(公告)号：US20100224860A1
公开(公告)日：2010-09-09
申请号：US12782107
申请日：2010-05-18
CPC分类号： H01L33/04 , H01L33/0016 , H01L33/08 , H01L33/32
摘要： An LED made from a wide band gap semiconductor material and having a low resistance p-type confinement layer with a tunnel junction in a wide band gap semiconductor device is disclosed. A dissimilar material is placed at the tunnel junction where the material generates a natural dipole. This natural dipole is used to form a junction having a tunnel width that is smaller than such a width would be without the dissimilar material. A low resistance p-type confinement layer having a tunnel junction in a wide band gap semiconductor device may be fabricated by generating a polarization charge in the junction of the confinement layer, and forming a tunnel width in the junction that is smaller than the width would be without the polarization charge. Tunneling through the tunnel junction in the confinement layer may be enhanced by the addition of impurities within the junction. These impurities may form band gap states in the junction.
摘要翻译： 公开了一种由宽带隙半导体材料制成的LED，并具有在宽带隙半导体器件中具有隧道结的低电阻p型约束层。 不同的材料放置在材料产生天然偶极子的隧道结处。 该天然偶极子用于形成隧道宽度小于不具有不同材料的宽度的接合点。 在宽带隙半导体器件中具有隧道结的低电阻p型限制层可以通过在限制层的接合处产生极化电荷并在接合部中形成小于宽度的隧道宽度来制造 没有极化电荷。 可以通过在连接处添加杂质来增强通过限制层中的隧道结的隧穿。 这些杂质可能在结中形成带隙状态。
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39.发明授权公开(公告)号：US07728356B2
公开(公告)日：2010-06-01
申请号：US12131704
申请日：2008-06-02
申请人： Chang Soo Suh , Umesh K. Mishra
发明人： Chang Soo Suh , Umesh K. Mishra
IPC分类号： H01L29/778
CPC分类号： H01L29/7786 , H01L29/1066 , H01L29/2003 , H01L29/42316 , H01L29/432 , H01L29/66462
摘要： An enhancement mode High Electron Mobility Transistor (HEMT) comprising a p-type nitride layer between the gate and a channel of the HEMT, for reducing an electron population under the gate. The HEMT may also comprise an Aluminum Nitride (AlN) layer between an AlGaN layer and buffer layer of the HEMT to reduce an on resistance of a channel.
摘要翻译： 一种增强型高电子迁移率晶体管（HEMT），其包括在HEMT的栅极和沟道之间的p型氮化物层，用于减少栅极下的电子群。 HEMT还可以在AlGaN层和HEMT的缓冲层之间包含氮化铝（AlN）层，以降低通道的导通电阻。
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40.发明申请METHOD USING LOW TEMPERATURE WAFER BONDING TO FABRICATE TRANSISTORS WITH HETEROJUNCTIONS OF Si(Ge) TO III-N MATERIALS 审中-公开使用低温波形与Si（Ge）至III-N材料的异相结合制造晶体管的方法公开(公告)号：US20080296617A1
公开(公告)日：2008-12-04
申请号：US12113847
申请日：2008-05-01
申请人： Umesh K. Mishra , Lee S. McCarthy
发明人： Umesh K. Mishra , Lee S. McCarthy
IPC分类号： H01L29/778 , H01L21/30 , H01L29/737
CPC分类号： H01L29/7802 , H01L21/187 , H01L29/1608 , H01L29/2003 , H01L29/267 , H01L29/7371 , H01L29/7786
摘要： A method for fabricating an electronic device, comprising wafer bonding a first semiconductor material to a III-nitride semiconductor, at a temperature below 550° C., to form a device quality heterojunction between the first semiconductor material and the III-nitride semiconductor, wherein the first semiconductor material is different from the III-nitride semiconductor and is selected for superior properties, or preferred integration or fabrication characteristics in the injector region as compared to the III-nitride semiconductor.
摘要翻译： 一种制造电子器件的方法，包括在低于550℃的温度下将第一半导体材料晶体结合到III族氮化物半导体，以在第一半导体材料和III族氮化物半导体之间形成器件质量异质结，其中 第一半导体材料与III族氮化物半导体不同，并且与III族氮化物半导体相比被选择用于喷射器区域中的优异性能或优选的集成或制造特性。
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