公开(公告)号：US07548143B2

公开(公告)日：2009-06-16

申请号：US11875604

申请日：2007-10-19

申请人： Dong Young Kim ,  Jae Kyoung Mun ,  Dong Suk Jun ,  Hae Cheon Kim

发明人： Dong Young Kim ,  Jae Kyoung Mun ,  Dong Suk Jun ,  Hae Cheon Kim

IPC分类号： H01P3/08 ,  H03H7/38

CPC分类号： H01P5/08 ,  H01L2924/19107

摘要： Provided is a microwave module having a converter for improving transmission characteristics in a millimeter-wave band. When a microstrip transmission line and a conductor-backed coplanar waveguide (CBCPW) transmission line are connected by wire bonding, a change in impedance caused by wire bonding and an abrupt change in electric field components between the two transmission lines are reduced by the converter. Therefore, insertion loss and return loss are reduced, and transmission characteristics in a millimeter-wave band are improved.

摘要翻译： 提供了一种具有用于改善毫米波段中的传输特性的转换器的微波模块。 当微带传输线和导体背面共面波导（CBCPW）传输线通过引线接合连接时，通过引线键合引起的阻抗变化和两条传输线之间的电场分量的突然变化被转换器减少。 因此，降低了插入损耗和回波损耗，提高了毫米波段的传输特性。

公开(公告)号：US07893462B2

公开(公告)日：2011-02-22

申请号：US11280608

申请日：2005-11-15

申请人： Jae Kyoung Mun ,  Hung Gu Ji ,  Ho Kyun Ahn ,  Hae Cheon Kim

发明人： Jae Kyoung Mun ,  Hung Gu Ji ,  Ho Kyun Ahn ,  Hae Cheon Kim

IPC分类号： H01L29/66

CPC分类号： H01L29/7785 ,  H01L29/42316

摘要： Provided are a transistor of a semiconductor device and a method of fabricating the same. The transistor of a semiconductor device includes an epitaxial substrate having a buffer layer, a first silicon (Si) planar doped layer, a first conductive layer, a second Si planar doped layer having a different dopant concentration from the first Si planar doped layer, and a second conductive layer, which are sequentially formed on a semi-insulating substrate; a source electrode and a drain electrode formed on both sides of the second conductive layer to penetrate the first Si planar doped layer to a predetermined depth to form an ohmic contact; and a gate electrode formed on the second conductive layer between the source electrode and the drain electrode to form a contact with the second conductive layer, wherein the gate electrode, the source electrode and the drain electrode are electrically insulated by an insulating layer, and a predetermined part of an upper part of the gate electrode is formed to overlap at least one of the source electrode and the drain electrode. Therefore, a maximum voltage that can be applied to the switching device is increased due to increases of a gate turn-on voltage and a breakdown voltage, and decrease of a parallel conduction component. As a result of this improved power handling capability, high-power and low-distortion characteristics and high isolation can be expected from the switching device.

摘要翻译： 提供半导体器件的晶体管及其制造方法。 半导体器件的晶体管包括具有缓冲层，第一硅（Si）平面掺杂层，第一导电层，具有与第一Si平面掺杂层不同的掺杂剂浓度的第二Si平面掺杂层的外延衬底，以及 第二导电层，其依次形成在半绝缘基板上; 源电极和漏电极，形成在第二导电层的两侧，以将第一Si平面掺杂层穿透到预定深度以形成欧姆接触; 以及形成在所述源电极和所述漏电极之间的所述第二导电层上的栅电极，以与所述第二导电层形成接触，其中所述栅电极，所述源电极和所述漏极由绝缘层电绝缘， 栅电极的上部的预定部分形成为与源电极和漏电极中的至少一个重叠。 因此，由于栅极导通电压和击穿电压的增加以及并联导通分量的降低，可以施加到开关器件的最大电压增加。 由于这种改进的功率处理能力，可以期望从开关器件获得高功率和低失真特性以及高隔离度。

公开(公告)号：US08304895B2

公开(公告)日：2012-11-06

申请号：US12764330

申请日：2010-04-21

申请人： Woojin Chang ,  Soon Il Yeo ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Woojin Chang ,  Soon Il Yeo ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01L23/053

CPC分类号： H01L23/5389 ,  H01L23/3107 ,  H01L24/83 ,  H01L24/90 ,  H01L25/03 ,  H01L2224/90 ,  H01L2924/00011 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2224/83851 ,  H01L2924/00

摘要： A semiconductor package is provided. The semiconductor package includes a package body, a plurality of semiconductor chips, and an external connection terminal. The package body is stacked with a plurality of sheets where conductive patterns and vias are disposed. The plurality of semiconductor chips are inserted into insert slots extending from one surface of the package body. The external connection terminal is provided on other surface opposite to the one surface of the package body. Here, the plurality of semiconductor chips are electrically connected to the external connection terminal.

摘要翻译： 提供半导体封装。 半导体封装包括封装体，多个半导体芯片和外部连接端子。 封装体与设置有导电图案和通孔的多个片层叠。 多个半导体芯片被插入到从封装主体的一个表面延伸的插入槽中。 外部连接端子设置在与封装主体的一个表面相对的另一表面上。 这里，多个半导体芯片电连接到外部连接端子。

公开(公告)号：US20120098099A1

公开(公告)日：2012-04-26

申请号：US13193670

申请日：2011-07-29

申请人： Jongmin LEE ,  Byoung-Gue Min ,  Seong-il Kim ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Jongmin LEE ,  Byoung-Gue Min ,  Seong-il Kim ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01L27/06 ,  H01L21/8222

CPC分类号： H01L27/0605 ,  H01L21/8252 ,  H01L29/732 ,  H01L29/93 ,  H03C1/36

摘要： Provided are a compound semiconductor device and a method of manufacturing the same. The semiconductor device includes: a substrate including a first region and a second region; a transistor including first to third conductive impurity layers stacked on the substrate of the first region; and a variable capacitance diode spaced apart from the transistor of the first region and including the first and second conductive impurity layers stacked on the substrate of the second region.

摘要翻译： 提供一种化合物半导体器件及其制造方法。 半导体器件包括：衬底，其包括第一区域和第二区域; 晶体管，包括堆叠在所述第一区域的所述衬底上的第一至第三导电杂质层; 以及与第一区域的晶体管间隔开并且包括堆叠在第二区域的衬底上的第一和第二导电杂质层的可变电容二极管。

公开(公告)号：US20110140825A1

公开(公告)日：2011-06-16

申请号：US12968022

申请日：2010-12-14

申请人： Seong-il KIM ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Seong-il KIM ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01F27/30

CPC分类号： H01F17/0006 ,  H01F2017/0086 ,  H01L28/10

摘要： Provided is an inductor. The inductor includes a first to a fourth conductive terminals formed in one direction within a semiconductor substrate, a first conductive line formed on one side of the semiconductor substrate and electrically connected to the second and third conductive terminals interiorly positioned among the first to fourth conductive terminals, a second conductive line formed on the one side of the semiconductor substrate and electrically connected to the first and fourth conductive terminals exteriorly positioned among the first to fourth conductive terminals, and a third conductive line formed on the other side of the semiconductor substrate and electrically connected to the first and third conductive terminals among the first to fourth conductive terminals.

摘要翻译： 提供一种电感器。 电感器包括在半导体衬底内的一个方向上形成的第一至第四导电端子，形成在半导体衬底的一侧上的第一导电线，并且电连接到内部位于第一至第四导电端子之间的第二和第三导电端子 形成在所述半导体衬底的一侧上并与外部位于所述第一至第四导电端子之间的所述第一和第四导电端子电连接的第二导电线，以及形成在所述半导体衬底的另一侧上并电连接的第三导电线 连接到第一至第四导电端子中的第一和第三导电端子。

公开(公告)号：US20110133843A1

公开(公告)日：2011-06-09

申请号：US12960153

申请日：2010-12-03

申请人： Seong-Il KIM ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Seong-Il KIM ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H03F3/68

CPC分类号： H03F3/245 ,  H03F1/0261 ,  H03F1/52 ,  H03F3/19 ,  H03F3/211 ,  H03F2200/18 ,  H03F2200/451

摘要： Provided is a power amplifier device. The power amplifier device includes: a cutoff unit cutting off a direct current (DC) component of a signal delivered from a signal input terminal; a circuit protecting unit connected to the cutoff unit and stabilizing a signal delivered from the cutoff unit; and an amplification unit connected to the circuit protecting unit and amplifying a signal delivered from the circuit protecting unit, wherein the amplification unit comprises a plurality of transistors connected in parallel to the circuit protecting unit and the circuit protecting unit comprises resistors connected to between bases of the plurality of transistors.

摘要翻译： 提供了一种功率放大器装置。 功率放大器装置包括：切断单元，切断从信号输入端子发送的信号的直流（DC）分量; 连接到所述切断单元的电路保护单元，并且稳定从所述切断单元传送的信号; 以及放大单元，连接到所述电路保护单元并放大从所述电路保护单元传递的信号，其中所述放大单元包括与所述电路保护单元并联连接的多个晶体管，所述电路保护单元包括电阻器， 多个晶体管。

公开(公告)号：US20110049698A1

公开(公告)日：2011-03-03

申请号：US12764330

申请日：2010-04-21

申请人： Woojin CHANG ,  Soon II Yeo ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Woojin CHANG ,  Soon II Yeo ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01L23/538 ,  H01L23/02 ,  H01L21/50

CPC分类号： H01L23/5389 ,  H01L23/3107 ,  H01L24/83 ,  H01L24/90 ,  H01L25/03 ,  H01L2224/90 ,  H01L2924/00011 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2224/83851 ,  H01L2924/00

摘要： A semiconductor package is provided. The semiconductor package includes a package body, a plurality of semiconductor chips, and an external connection terminal. The package body is stacked with a plurality of sheets where conductive patterns and vias are disposed. The plurality of semiconductor chips are inserted into insert slots extending from one surface of the package body. The external connection terminal is provided on other surface opposite to the one surface of the package body. Here, the plurality of semiconductor chips are electrically connected to the external connection terminal.

摘要翻译： 提供半导体封装。 半导体封装包括封装体，多个半导体芯片和外部连接端子。 封装体与设置有导电图案和通孔的多个片层叠。 多个半导体芯片被插入到从封装主体的一个表面延伸的插入槽中。 外部连接端子设置在与封装主体的一个表面相对的另一表面上。 这里，多个半导体芯片电连接到外部连接端子。

公开(公告)号：US08130041B2

公开(公告)日：2012-03-06

申请号：US12960153

申请日：2010-12-03

申请人： Seong-Il Kim ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Seong-Il Kim ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H03F3/68

CPC分类号： H03F3/245 ,  H03F1/0261 ,  H03F1/52 ,  H03F3/19 ,  H03F3/211 ,  H03F2200/18 ,  H03F2200/451

摘要： Provided is a power amplifier device. The power amplifier device includes: a cutoff unit cutting off a direct current (DC) component of a signal delivered from a signal input terminal; a circuit protecting unit connected to the cutoff unit and stabilizing a signal delivered from the cutoff unit; and an amplification unit connected to the circuit protecting unit and amplifying a signal delivered from the circuit protecting unit, wherein the amplification unit comprises a plurality of transistors connected in parallel to the circuit protecting unit and the circuit protecting unit comprises resistors connected to between bases of the plurality of transistors.

摘要翻译： 提供了一种功率放大器装置。 功率放大器装置包括：切断单元，切断从信号输入端子发送的信号的直流（DC）分量; 连接到所述切断单元的电路保护单元，并且稳定从所述切断单元传送的信号; 以及放大单元，连接到所述电路保护单元并放大从所述电路保护单元传送的信号，其中所述放大单元包括与所述电路保护单元并联连接的多个晶体管，所述电路保护单元包括电阻器， 多个晶体管。

公开(公告)号：US07986211B2

公开(公告)日：2011-07-26

申请号：US12968022

申请日：2010-12-14

申请人： Seong-il Kim ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

发明人： Seong-il Kim ,  Jongmin Lee ,  Byoung-Gue Min ,  Hyung Sup Yoon ,  Hae Cheon Kim ,  Eun Soo Nam

IPC分类号： H01F5/00

CPC分类号： H01F17/0006 ,  H01F2017/0086 ,  H01L28/10

摘要： Provided is an inductor. The inductor includes a first to a fourth conductive terminals formed in one direction within a semiconductor substrate, a first conductive line formed on one side of the semiconductor substrate and electrically connected to the second and third conductive terminals interiorly positioned among the first to fourth conductive terminals, a second conductive line formed on the one side of the semiconductor substrate and electrically connected to the first and fourth conductive terminals exteriorly positioned among the first to fourth conductive terminals, and a third conductive line formed on the other side of the semiconductor substrate and electrically connected to the first and third conductive terminals among the first to fourth conductive terminals.

摘要翻译： 提供一种电感器。 电感器包括在半导体衬底内的一个方向上形成的第一至第四导电端子，形成在半导体衬底的一侧上的第一导电线，并且电连接到内部位于第一至第四导电端子之间的第二和第三导电端子 形成在所述半导体衬底的一侧上并与外部位于所述第一至第四导电端子之间的所述第一和第四导电端子电连接的第二导电线，以及形成在所述半导体衬底的另一侧上并电连接的第三导电线 连接到第一至第四导电端子中的第一和第三导电端子。

公开(公告)号：US07933576B2

公开(公告)日：2011-04-26

申请号：US11946315

申请日：2007-11-28

申请人： Hong Gu Ji ,  Hae Cheon Kim ,  Hyun Kyu Yu

发明人： Hong Gu Ji ,  Hae Cheon Kim ,  Hyun Kyu Yu

IPC分类号： H04B1/16

CPC分类号： H03D7/1425 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1475 ,  H03D2200/0043

摘要： A sub-harmonic mixer is provided, which includes: a mixer core having first and second transistors performing switching operations in response to a local oscillator (LO) signal and a radio frequency (RF) signal; a power source applying bias maximizing nonlinearity of a transistor included in the mixer core; an RF port applying an RF signal to the mixer core; an LO port applying an LO signal to the mixer core; and first and second phase delay circuits in which the RF signals applied to the first and second transistors have a 180-degree phase difference.

摘要翻译： 提供了一种亚谐波混频器，其包括：具有第一和第二晶体管的混频器核，其响应于本地振荡器（LO）信号和射频（RF）信号执行切换操作; 施加偏置最大化混合器核心中包括的晶体管的非线性的电源; 将RF信号施加到混频器核心的RF端口; LO端口将LO信号施加到混频器核心; 以及施加到第一和第二晶体管的RF信号具有180度相位差的第一和第二相位延迟电路。