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    Three-dimensional semiconductor memory devices
    31.
    发明授权
    Three-dimensional semiconductor memory devices 有权
    三维半导体存储器件

    公开(公告)号：US08569827B2

    公开(公告)日：2013-10-29

    申请号：US13220376

    申请日：2011-08-29

    申请人： Changhyun Lee ,  Byoungkeun Son ,  Hyejin Cho

    发明人： Changhyun Lee ,  Byoungkeun Son ,  Hyejin Cho

    IPC分类号： H01L29/792

    CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/7926

    摘要： Three-dimensional (3D) nonvolatile memory devices include a substrate having a well region of second conductivity type (e.g., P-type) therein and a common source region of first conductivity type (e.g., N-type) on the well region. A recess is provided, which extends partially (or completely) through the common source region. A vertical stack of nonvolatile memory cells are provided on the substrate. This vertical stack of nonvolatile memory cells includes a vertical stack of spaced-apart gate electrodes and a vertical active region, which extends on sidewalls of the vertical stack of spaced-apart gate electrodes and on a sidewall of the recess. Gate dielectric layers are provided, which extend between respective ones of the vertical stack of spaced-apart gate electrodes and the vertical active region. The gate dielectric layers may include a composite of a tunnel insulating layer, a charge storage layer, a relatively high bandgap barrier dielectric layer and a blocking insulating layer having a relatively high dielectric strength.

    摘要翻译： 三维（3D）非易失性存储器件包括其中具有第二导电类型（例如，P型）的阱区和在该区域上具有第一导电类型（例如N型）的公共源极区的衬底。 设置有通过共同源极区域部分（或完全）延伸的凹部。 在基板上提供了一堆非易失性存储单元。 这种垂直堆叠的非易失性存储单元包括间隔开的栅电极的垂直叠层和垂直有源区，该垂直有源区延伸在间隔开的栅电极的垂直叠层的侧壁上并在凹槽的侧壁上延伸。 提供栅介电层，其在相互间隔开的栅电极的垂直叠层和垂直有源区之间延伸。 栅极电介质层可以包括隧道绝缘层，电荷存储层，相对高的带隙势垒介电层和具有相对高的介电强度的阻挡绝缘层的复合材料。

    NONVOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
    32.
    发明申请
    NONVOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US20120104484A1

    公开(公告)日：2012-05-03

    申请号：US13279708

    申请日：2011-10-24

    申请人： Changhyun LEE ,  Sung-II Chang ,  Byoungkeun Son

    发明人： Changhyun LEE ,  Sung-II Chang ,  Byoungkeun Son

    IPC分类号： H01L29/792

    CPC分类号： H01L27/11582 ,  H01L29/792 ,  H01L45/1233 ,  H01L45/1253

    摘要： A nonvolatile memory device includes a substrate, a stacked structure with conductive materials and first insulating materials and the conductive materials and the first insulating materials are alternately stacked on the substrate, and a plurality of pillars in contact with the substrate and the pillars extend through the stacked structure in a direction perpendicular to the substrate. The device also includes information storage layers between the conductive materials and the first insulating materials, and second insulating materials between the first insulating materials and the pillars.

    摘要翻译： 非易失性存储器件包括基板，具有导电材料和第一绝缘材料的堆叠结构，并且导电材料和第一绝缘材料交替地堆叠在基板上，并且与基板和支柱接触的多个支柱延伸穿过 在垂直于衬底的方向上堆叠结构。 该装置还包括在导电材料和第一绝缘材料之间的信息存储层，以及在第一绝缘材料和支柱之间的第二绝缘材料。

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
    33.
    发明申请
    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE 有权
    三维半导体存储器件

    公开(公告)号：US20120068247A1

    公开(公告)日：2012-03-22

    申请号：US13217416

    申请日：2011-08-25

    申请人： CHANGHYUN LEE ,  Byoungkeun Son ,  Youngwoo Park

    发明人： CHANGHYUN LEE ,  Byoungkeun Son ,  Youngwoo Park

    IPC分类号： H01L27/088

    CPC分类号： H01L27/11578 ,  H01L27/11551 ,  H01L27/11556 ,  H01L29/7889 ,  H01L29/7926

    摘要： Provided are three-dimensional semiconductor devices. The devices may include gap-fill insulating patterns configured to upwardly extend from a substrate and an electrode structure defined by sidewalls of the gap-fill insulating patterns. Vertical structures may be provided between adjacent ones of the gap-fill insulating patterns to penetrate the electrode structure, and the vertical structures may include first and second rows of the vertical structures. A separation pattern may be provided between the first and second rows of vertical structures and include a separation semiconductor layer. The separation pattern extends along a direction parallel to the first and second rows of vertical structures.

    摘要翻译： 提供三维半导体器件。 这些装置可以包括配置成从基板向上延伸的间隙填充绝缘图案和由间隙填充绝缘图案的侧壁限定的电极结构。 可以在相邻的间隙填充绝缘图案之间提供垂直结构以穿透电极结构，并且垂直结构可以包括垂直结构的第一行和第二行。 可以在第一和第二排垂直结构之间提供分离图案，并且包括分离半导体层。 分离图案沿着平行于第一和第二排垂直结构的方向延伸。