公开(公告)号：US06804442B1

公开(公告)日：2004-10-12

申请号：US10449192

申请日：2003-06-02

申请人： Hirohito Watanabe ,  Keiji Ohashi

发明人： Hirohito Watanabe ,  Keiji Ohashi

IPC分类号： G02B602

CPC分类号： G02B6/4403 ,  G02B6/02395

摘要： An improved optical fiber is described. The optical fiber comprises: a fiber glass structure; a first jacket layer made of a soft curable resin and directly covering the external surface of said fiber glass structure; and a second jacket layer made of a rigid curable resin and covering the external surface of said fiber glass structure through said first jacket layer. The mechanical factors of said fiber glass structure, the mechanical factors of said first jacket layer and the mechanical factors of said second jacket layer are selected in order that the Young's modulus of said first jacket layer is larger than the average tensile stress (&sgr;r+&sgr;&thgr;+&sgr;z)/3 as applied to said first jacket layer 5 while the resin temperature of UV curable resins largely falls from the temperature when the rigid UV curable resin starts hardening to the temperature when the hardening is finished.

摘要翻译： 描述了改进的光纤。 光纤包括：玻璃纤维结构; 由软固化树脂制成的第一护套层，并直接覆盖所述玻璃纤维结构体的外表面; 以及由刚性可固化树脂制成的第二护套层，并通过所述第一护套层覆盖所述玻璃纤维结构的外表面。 选择所述玻璃纤维结构的机械因素，所述第一护套层的机械因素和所述第二护套层的机械因素，使得所述第一护套层的杨氏模量大于平均拉伸应力（sigmar + sigmatheta + sigmaz）/ 3，而UV硬化树脂的树脂温度从刚性UV固化树脂开始硬化时的温度到硬化结束时的温度大大降低。

公开(公告)号：US6146966A

公开(公告)日：2000-11-14

申请号：US859210

申请日：1997-05-20

申请人： Toshiyuki Hirota ,  Hirohito Watanabe ,  Fumiki Aiso ,  Shuji Fujiwara ,  Masanobu Zenke

发明人： Toshiyuki Hirota ,  Hirohito Watanabe ,  Fumiki Aiso ,  Shuji Fujiwara ,  Masanobu Zenke

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L28/84 ,  H01L27/10852

摘要： In a process of forming hemi-spherical silicon grains on an amorphous silicon film in accordance with the "crystal nucleation" process, in order to form crystal nuclei on a top surface and a side surface of the amorphous silicon film, SiH.sub.4 is irradiated onto the top and side surfaces of the amorphous silicon film at a stabilized temperature which is lower than, by at least 5.degree. C., an annealing temperature for growing the hemi-spherical silicon grains from the crystal nuclei, with the result that it is possible to suppress or retard the growth of the crystals growing into the amorphous silicon film from a boundary between the amorphous silicon film and an interlayer insulator film. Thereafter, the amorphous silicon film having the crystal nuclei thus formed on the surface thereof is annealed at the annealing temperature so that the hemi-spherical silicon grains are formed on the whole surface of the top and side surfaces of the amorphous silicon film.

摘要翻译： 在根据“晶体成核”法在非晶硅膜上形成半球形硅晶粒的过程中，为了在非晶硅膜的顶表面和侧表面上形成晶核，将SiH 4照射到 该非晶硅膜的顶表面和侧表面在稳定的温度下低于至少5℃的用于从晶核生长半球形硅晶粒的退火温度，结果是可以 从非晶硅膜和层间绝缘膜之间的边界抑制或延缓从非晶硅膜生长的晶体的生长。 此后，在其表面上形成具有晶核的非晶硅膜在退火温度下退火，使得半球形硅晶粒形成在非晶硅膜的顶表面和侧表面的整个表面上。

公开(公告)号：US5973355A

公开(公告)日：1999-10-26

申请号：US851285

申请日：1997-05-05

申请人： Hiroki Shirai ,  Taishi Kubota ,  Ichiro Honma ,  Hirohito Watanabe ,  Haruhiko Ono ,  Takeshi Okazawa

发明人： Hiroki Shirai ,  Taishi Kubota ,  Ichiro Honma ,  Hirohito Watanabe ,  Haruhiko Ono ,  Takeshi Okazawa

IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/7883 ,  Y10S257/90

摘要： There is disclosed a nonvolatile semiconductor memory device, which is capable of maintaining a high capacitance ratio even when a memory cell is formed in a micronized size without increasing the number of manufacturing steps. In a flash memory having buried diffusion layer type cells, a source region and drain regions and are formed in self alignment with a polycrystalline film pattern which has a polycrystalline silicon film having projecting and recessing parts in its upper surface.

摘要翻译： 公开了一种非易失性半导体存储器件，即使在不增加制造步骤的数量的情况下，即使在微细尺寸形成存储单元时，也能够保持高电容比。 在具有掩埋扩散层型电池的闪速存储器中，源极区域和漏极区域形成为与其上表面具有突出和凹陷部分的多晶硅膜的多晶膜图案自对准地形成。

公开(公告)号：US5910019A

公开(公告)日：1999-06-08

申请号：US829358

申请日：1997-04-02

申请人： Hirohito Watanabe ,  Ichiro Honma

发明人： Hirohito Watanabe ,  Ichiro Honma

IPC分类号： H01L21/285 ,  H01L21/02 ,  H01L21/205 ,  H01L21/28 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8244 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108 ,  H01L27/11 ,  H01L21/00

CPC分类号： H01L27/10852 ,  H01L27/11 ,  H01L27/1108 ,  H01L28/84

摘要： A method of forming a silicon layer disclosed herein includes the steps of depositing an amorphous silicon layer on a substrate, irradiating a silane gas to the substrate, and performing an annealing process in a high vacuum or in an inert gas. The amorphous silicon layer is thereby converted into a silicon layer having an uneven surface caused by hemispherical or spherical silicon grains. The annealing process may be performed while irradiating a hydrogen gas or an oxidizing gas. In this case, such a silicon layer that has an even surface is formed.

摘要翻译： 本文公开的形成硅层的方法包括以下步骤：在衬底上沉积非晶硅层，向衬底照射硅烷气体，并在高真空或惰性气体中进行退火处理。 从而将非晶硅层转变成由半球形或球形硅晶粒引起的具有不平坦表面的硅层。 可以在照射氢气或氧化气体的同时进行退火处理。 在这种情况下，形成具有均匀表面的硅层。

公开(公告)号：US5753949A

公开(公告)日：1998-05-19

申请号：US710939

申请日：1996-09-24

申请人： Ichiroh Honma ,  Hirohito Watanabe

发明人： Ichiroh Honma ,  Hirohito Watanabe

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/76

CPC分类号： H01L27/10852 ,  H01L27/10817

摘要： Used nearer to a MOS transistor (25, 29(1), 29(2)) together with another capacitor electrode (39) with a dielectric film (37) interposed for use in a DRAM, a capacitor electrode comprises a conductor pole (53) and a conductor layer (55) which is held by the conductor pole and comprises a plate portion (57) extended perpendicular to a pole axis and having a plate periphery and a peripheral portion (59) extended parallel to the pole axis from the plate periphery towards a pole end. Preferably, the conductor layer is held by the pole on a plurality of levels. A planar conductor layer may additionally be held at the pole end perpendicular to the pole axis. Word (41) and bit (49) lines are embedded in an insulator layer (43, 51) for the capacitor and the transistor.

摘要翻译： 与另一个电容器电极（39）一起更靠近MOS晶体管（25,29（1），29（2）），电容器电极插入用于DRAM中，电容器电极包括导体极（53 ）和导体层（55），所述导体层（55）由所述导体极保持，并且包括垂直于极轴延伸并具有板周边的平板部（57）和从所述平板平行于所述极轴延伸的周边部（59） 周边朝极端。 优选地，导体层由极保持在多个层上。 平面导体层可以另外保持在垂直于极轴的极端。 字（41）和位（49）线被嵌入用于电容器和晶体管的绝缘体层（43,41）中。

公开(公告)号：US5691249A

公开(公告)日：1997-11-25

申请号：US447561

申请日：1995-05-23

申请人： Hirohito Watanabe ,  Toru Tatsumi

发明人： Hirohito Watanabe ,  Toru Tatsumi

IPC分类号： H01L21/02 ,  H01L27/108 ,  H01L21/205

CPC分类号： H01L28/84 ,  H01L27/10817 ,  H01L28/82 ,  H01L28/90 ,  Y10S438/964

摘要： A method for fabricating a polycrystalline silicon having a roughed surface, which is useful for a capacitor electrode is disclosed. The method is featured by depositing a polycrystalline silicon layer in such a manner that grains of silicon are caused at the surface of the polycrystalline silicon layer. The polycrystalline silicon layer thus obtained has a large effective surface area and is suitable for a capacitor electrode because of its increased effective surface area.

摘要翻译： 公开了一种用于制造具有粗糙表面的多晶硅的方法，其用于电容器电极。 该方法的特征在于以如下方式沉积多晶硅层，即在多晶硅层的表面引起硅晶粒。 这样获得的多晶硅层具有大的有效表面积，由于其有效表面积增加，因此适用于电容器电极。

公开(公告)号：US5397748A

公开(公告)日：1995-03-14

申请号：US996978

申请日：1992-12-24

申请人： Hirohito Watanabe ,  Sadayuki Ohnishi

发明人： Hirohito Watanabe ,  Sadayuki Ohnishi

IPC分类号： H01L21/02 ,  H01L21/314 ,  H01L21/321

CPC分类号： H01L28/40 ,  H01L21/3145 ,  H01L21/32105 ,  H01L21/3211 ,  Y10S148/014

摘要： A thermal oxidation method for producing a semiconductor device having a capacitor insulating film structure capable of making a thin film having a small leakage current and small temperature dependence of the leakage current. In the insulating film, a silicon nitride film with a small electron mobility and a silicon oxide film with a small hole mobility are alternately laminated in order of the nitride film/oxide film/nitride film/oxide film from a lower electrode side. A current component such as electrons flowing in this insulating film structure is limited by the layer with the smaller mobility to reduce the leakage current. An oxide film thickness of approximately several .ANG. can thus be strictly controlled. By forming the silicon nitride film between the high dielectric oxide film and the electrode, the reaction of the silicon electrode and the high dielectric oxide film can be prevented.

摘要翻译： 一种用于制造具有能够制造具有小泄漏电流和较小的漏电流的温度依赖性的薄膜的电容器绝缘膜结构的半导体器件的热氧化方法。 在绝缘膜中，具有小电子迁移率的氮化硅膜和具有小空穴迁移率的氧化硅膜按照来自下电极侧的氮化物膜/氧化膜/氮化物膜/氧化物膜的顺序交替层叠。 在该绝缘膜结构中流动的电子的电流成分被具有较小迁移率的层限制，以减少漏电流。 因此可以严格控制大约几个ANGSTROM的氧化膜厚度。 通过在高电介质氧化膜和电极之间形成氮化硅膜，可以防止硅电极和高电介质氧化膜的反应。

公开(公告)号：US08841976B2

公开(公告)日：2014-09-23

申请号：US13345974

申请日：2012-01-09

申请人： Taiji Ogawa ,  Hirohito Watanabe ,  Masazaku Sato

发明人： Taiji Ogawa ,  Hirohito Watanabe ,  Masazaku Sato

IPC分类号： H01P3/08 ,  H05K1/02

CPC分类号： H05K1/024 ,  H01P3/081 ,  H05K1/0225 ,  H05K1/0245 ,  H05K1/0253 ,  H05K2201/09236 ,  H05K2201/09681

摘要： The printed wiring board has a conductor of signal line 41 and two conductive lines 42 on one face of the first insulating layer 10 covered by a second insulating layer 20, while having a ground layer of the ground 30 potential on the opposite face thereof, when the dielectric tangent A of the second insulating layer (insulating layer A) 20 is larger than the dielectric tangent B of the first insulating layer (insulating layer B) 10, Relational Expression 1: (relative permittivity B)·(width (W41) of signal line(s) 41)/(thickness (T10) of first insulating layer (insulating layer B) 10)>(relative permittivity A)·{(thickness (T41) of signal line(s) 41)/(distance (S1) between signal line(s) 41 and one conductive line 42a)+(thickness (T41) of signal line(s) 41)/(distance (S2) between signal line(s) 41 and other conductive line 42b)+(thickness (T41) of signal lines 41)/(distance (S3) between pair of signal lines (41a and 41b)·2} is satisfied.

摘要翻译： 印刷电路板具有由第二绝缘层20覆盖的第一绝缘层10的一面上的信号线41的导体和两条导线42，同时在其相对面上具有接地层30的电位的地层， 第二绝缘层（绝缘层A）20的介质切线A大于第一绝缘层（绝缘层B）10的介质切线B，关系式1（相对介电常数B）·（宽（W41） 信号线41）/（第一绝缘层（绝缘层B）的厚度（T10））10）>（相对介电常数A）·{（信号线的厚度（T41）41）/（距离（S1 信号线41和一根导线42a之间）+（信号线41的厚度（T41））/（信号线41与其他导线42b的距离（S2））+（厚度 信号线41的（T41）/（信号线对（41a，41b）·2之间的距离（S3））满足。

公开(公告)号：US08546696B2

公开(公告)日：2013-10-01

申请号：US12820605

申请日：2010-06-22

申请人： Hirohito Watanabe

发明人： Hirohito Watanabe

IPC分类号： H05K1/00 ,  H05K3/00 ,  H01R9/00

CPC分类号： H05K1/117 ,  H05K1/118 ,  H05K3/0058 ,  H05K3/386 ,  H05K2201/0191 ,  H05K2201/09154 ,  H05K2201/09827 ,  H05K2201/2009 ,  Y10T29/49147 ,  Y10T156/10

摘要： A printed circuit board having a connection terminal which includes: an insulating substrate including first and second surfaces, and an end surface along an outline normal to an insertion direction of the connection terminal; at least one lead wiring layer formed on the first surface of the insulating substrate; an insulating protection film covering the lead wiring layer; at least one lead terminal layer constituting an end portion of the lead wiring layer, the lead terminal layer being formed into a strip, and having an end surface along the outline; a reinforcement body adhered on the second surface of the insulating substrate at a backside position of the lead terminal layer; wherein a distance between an outer surface of the lead terminal layer and an outer surface of the reinforcement body on the outline side is smaller than a distance therebetween on the lead wiring layer side.

摘要翻译： 一种具有连接端子的印刷电路板，包括：绝缘基板，包括第一表面和第二表面;以及沿着垂直于连接端子的插入方向的轮廓的端面; 形成在绝缘基板的第一表面上的至少一个引线布线层; 覆盖引线布线层的绝缘保护膜; 构成所述引线配线层的端部的至少一个引线端子层，所述引线端子层形成为带状，并且具有沿着所述轮廓的端面; 加强体，其在所述引线端子层的背面位置粘附在所述绝缘基板的所述第二表面上; 其中，引线端子层的外表面与轮廓侧的加强体的外表面之间的距离小于引线布线层侧的距离。

公开(公告)号：US20080203500A1

公开(公告)日：2008-08-28

申请号：US12071126

申请日：2008-02-15

申请人： Takashi Ogura ,  Nobuyuki Ikarashi ,  Toshiyuki Iwamoto ,  Hirohito Watanabe

发明人： Takashi Ogura ,  Nobuyuki Ikarashi ,  Toshiyuki Iwamoto ,  Hirohito Watanabe

IPC分类号： H01L29/78

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/6656 ,  H01L29/78

摘要： A semiconductor device provided with a MIS type field effect transistor comprising a silicon substrate, a gate insulating film having a high-dielectric-constant metal oxide film which is formed on the silicon substrate via a silicon containing insulating film, a silicon-containing gate electrode formed on the gate insulating film, and a sidewall including, as a constituting material, silicon oxide on a lateral face side of the gate electrode, wherein a silicon nitride film is interposed between the sidewall and at least the lateral face of the gate electrode. This semiconductor device, although having a fine structure with a small gate length, is capable of low power consumption and fast operation.

摘要翻译： 一种设置有MIS型场效应晶体管的半导体器件，包括硅衬底，具有通过含硅绝缘膜形成在硅衬底上的高介电常数金属氧化物膜的栅极绝缘膜，含硅栅电极 形成在所述栅极绝缘膜上的侧壁，以及在所述栅电极的侧面上包含氧化硅作为构成材料的侧壁，其中，所述侧壁与所述栅电极的至少所述侧面之间插入有氮化硅膜。 该半导体器件尽管具有栅极长度小的精细结构，但能够实现低功耗和快速操作。