公开(公告)号：US5837605A

公开(公告)日：1998-11-17

申请号：US563082

申请日：1995-11-27

申请人： Young-wook Park ,  Dae-rok Bae ,  Mun-han Park

发明人： Young-wook Park ,  Dae-rok Bae ,  Mun-han Park

IPC分类号： H01L21/335 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L29/78 ,  H01L21/441

CPC分类号： H01L21/28061

摘要： A manufacturing method for transistors wherein silicide is directed doped with a conductive impurity includes the steps of: forming a field oxide film defining an active region on a semiconductor substrate; forming transistors wherein a doped first silicide film is formed on gate electrodes on said active region; forming an interlayer dielectric film having contact holes on the whole surface of said semiconductor substrate; forming spacers on the innerwalls of each contact hole;p forming a thin doped polysilicon film on the whole surface of said semiconductor surface; and forming a doped second silicide film on the whole surface of said doped polysilicon film, filling each contact hole. The silicide film is directly doped with conductive impurity so that the conductive impurity of a polysilicon film can be prevented from being diffused to the outside. Therefore, the doped silicide film is useful to prevent the threshold voltage from increasing and the saturation current from reducing.

摘要翻译： 其中硅化物被引导掺杂有导电杂质的晶体管的制造方法包括以下步骤：在半导体衬底上形成限定有源区的场氧化物膜; 形成晶体管，其中在所述有源区上的栅电极上形成掺杂的第一硅化物膜; 在所述半导体衬底的整个表面上形成具有接触孔的层间绝缘膜; 在每个接触孔的内壁上形成间隔物; p在所述半导体表面的整个表面上形成薄掺杂多晶硅膜; 以及在所述掺杂多晶硅膜的整个表面上形成掺杂的第二硅化物膜，填充每个接触孔。 硅化物膜直接掺杂有导电杂质，使得可以防止多晶硅膜的导电杂质扩散到外部。 因此，掺杂的硅化物膜可用于防止阈值电压升高，饱和电流降低。

公开(公告)号：US06806183B2

公开(公告)日：2004-10-19

申请号：US10295348

申请日：2002-11-15

申请人： Chang-seok Kang ,  Doo-sup Hwang ,  Cha-young Yoo ,  Young-wook Park ,  Hong-bae Park

发明人： Chang-seok Kang ,  Doo-sup Hwang ,  Cha-young Yoo ,  Young-wook Park ,  Hong-bae Park

IPC分类号： H01L214763

CPC分类号： H01L28/60 ,  H01L21/321 ,  H01L28/55

摘要： Methods and apparatus for plasma annealing layers of a microelectronic capacitor on a substrate are provided to improve the leakage current characteristics of a capacitor and/or to reduce the number of impurities in an electrode.

摘要翻译： 提供了用于提高电容器的漏电流特性和/或减少电极中杂质数量的基板上的微电子电容器等离子体退火层的方法和装置。

公开(公告)号：US06403495B2

公开(公告)日：2002-06-11

申请号：US09742650

申请日：2000-12-21

申请人： Young-sun Kim ,  Young-wook Park

发明人： Young-sun Kim ,  Young-wook Park

IPC分类号： H01L2100

CPC分类号： H01L28/84 ,  H01L27/10852 ,  H01L28/90

摘要： A method for fabricating a capacitor of a semiconductor device is provided. In the capacitor fabricating method, the step of forming a lower electrode by using gas including chlorine is included after the step of forming hemispherical grained silicon (HSG—Si) seeds. Also, after the step of selectively growing only HSG—Si seeds formed on the lower electrode, the step of removing the HSG—Si seeds formed on an insulation layer pattern through an etching process using a gas including chlorine is included. Thus, the surface area of the lower electrode is increased, so that capacitance is increased. Also, an electrical short between the lower electrodes of each adjacent capacitor can be prevented without decreasing capacitance.

摘要翻译： 提供一种制造半导体器件的电容器的方法。 在电容器制造方法中，在形成半球状粒状硅（HSG-Si）种子的步骤之后，包括通过使用包含氯的气体形成下部电极的步骤。 此外，在仅选择生长在下电极上形成的HSG-Si种子的步骤之后，包括通过使用含氯气体的蚀刻工艺除去形成在绝缘层图案上的HSG-Si种子的步骤。 因此，下电极的表面积增大，电容增大。 此外，可以在不降低电容的情况下防止每个相邻电容器的下电极之间的电短路。

公开(公告)号：US06221742B1

公开(公告)日：2001-04-24

申请号：US09146260

申请日：1998-09-03

申请人： Young-wook Park ,  Cha-young Yoo ,  Young-sun Kim ,  Seung-hee Nam

发明人： Young-wook Park ,  Cha-young Yoo ,  Young-sun Kim ,  Seung-hee Nam

IPC分类号： H01L2120

CPC分类号： C23C16/54 ,  C23C16/24 ,  C23C16/4401

摘要： An apparatus for fabricating a semiconductor device having cooling jackets for preventing a gas from being exuded in a reaction chamber, thereby minimizing the generation of contaminating particles. The apparatus includes a reaction chamber having four cooling jackets respectively mounted on a first side wall adjacent to a wafer transfer chamber, a second side wall opposite to the first side wall, an upper wall and a bottom wall. A gate valve is disposed between the reaction chamber and the wafer transfer chamber and has a fifth cooling jacket. While fabricating a polysilicon film using the above apparatus, a pressure of a cassette chamber is controlled to be less than about 0.05 mtorr. Alternatively, a pressure of a cooling chamber and the wafer transfer are both controlled to be less than about 1.0 &mgr;torr.

摘要翻译： 一种用于制造具有用于防止气体渗透到反应室中的冷却夹套的半导体器件的装置，从而使污染颗粒的产生最小化。 该装置包括具有分别安装在与晶片传送室相邻的第一侧壁上的四个冷却夹套的反应室，与第一侧壁相对的第二侧壁，上壁和底壁。 闸阀设置在反应室和晶片传送室之间，并具有第五冷却套。 在使用上述装置制造多晶硅膜的同时，将盒室的压力控制在小于约0.05毫托。 或者，冷却室和晶片转移的压力都被控制为小于约1.0倍。

公开(公告)号：US6133148A

公开(公告)日：2000-10-17

申请号：US185093

申请日：1998-11-03

申请人： Seok-jun Won ,  Kyoung-hoon Kim ,  Young-wook Park ,  Kab-jin Nam ,  Duk-soo Yoon ,  Sun-woo Kwak

发明人： Seok-jun Won ,  Kyoung-hoon Kim ,  Young-wook Park ,  Kab-jin Nam ,  Duk-soo Yoon ,  Sun-woo Kwak

IPC分类号： H01L21/26 ,  C23C16/44 ,  C23C16/455 ,  C23C16/48 ,  H01L21/285 ,  H01L21/314 ,  H01L21/44 ,  H01L21/31

CPC分类号： C23C16/45561 ,  C23C16/45557 ,  C23C16/481 ,  H01L21/28556 ,  H01L21/314 ,  Y10S438/907

摘要： A method of depositing a thin film for a semiconductor device using a lamp heating type apparatus. In the method, a wafer is loaded into a processing chamber of the apparatus, and the pressure of the chamber and the temperature of a susceptor installed in the chamber are increased to a level higher than a deposition pressure and a deposition temperature, respectively. Then, the pressure of the chamber and the temperature of the susceptor are decreased to the deposition pressure and the deposition temperature, respectively, and a film is deposited on the wafer. The vacuum of the chamber is then released and the gas remaining in the chamber and a source gas injection tube is purged.

摘要翻译： 一种使用灯加热型设备沉积半导体器件用薄膜的方法。 在该方法中，将晶片装载到装置的处理室中，并且将室的压力和安装在室中的基座的温度分别提高到高于沉积压力和沉积温度的水平。 然后，室的压力和基座的温度分别降低到沉积压力和沉积温度，并且膜沉积在晶片上。 然后释放室的真空，并且清除残留在室中的气体和源气体注入管。

公开(公告)号：US6077573A

公开(公告)日：2000-06-20

申请号：US83350

申请日：1998-05-22

申请人： Young-sun Kim ,  Sang-hyeop Lee ,  Seung-hwan Lee ,  Young-wook Park ,  Mikio Takagi

发明人： Young-sun Kim ,  Sang-hyeop Lee ,  Seung-hwan Lee ,  Young-wook Park ,  Mikio Takagi

IPC分类号： H01L27/04 ,  C23C16/24 ,  H01L21/205 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108 ,  H05H1/24

CPC分类号： C23C16/24

摘要： A method of forming a microelectronic device includes the step of forming an impurity doped amorphous silicon layer on a microelectronic substrate using plasma-enhanced chemical vapor deposition. The impurity doped amorphous silicon layer is patterned so that portions of the microelectronic substrate are exposed adjacent the patterned amorphous silicon layer. A hemispherical grained silicon layer is then formed on the patterned amorphous silicon layer. Moreover, the step of forming the impurity doped amorphous silicon layer can be performed at a temperature of 400.degree. C. or less.

摘要翻译： 形成微电子器件的方法包括使用等离子体增强化学气相沉积在微电子衬底上形成掺杂杂质的非晶硅层的步骤。 图案化杂质掺杂非晶硅层，使得微电子衬底的部分暴露在图案化的非晶硅层附近。 然后在图案化的非晶硅层上形成半球形的硅层。 此外，形成杂质掺杂非晶硅层的步骤可以在400℃以下的温度下进行。

公开(公告)号：US5943570A

公开(公告)日：1999-08-24

申请号：US780636

申请日：1997-01-08

申请人： Young-wook Park ,  Young-sun Kim ,  Seung-hee Nam ,  Se-jin Shim ,  Cha-young Yoo ,  Kwan-young Oh

发明人： Young-wook Park ,  Young-sun Kim ,  Seung-hee Nam ,  Se-jin Shim ,  Cha-young Yoo ,  Kwan-young Oh

IPC分类号： H01L21/02 ,  H01L21/8242

CPC分类号： H01L27/10852 ,  H01L28/82

摘要： A capacitor for a semiconductor memory device and a method for manufacturing the same are provided. A lower electrode of a capacitor according to the present invention has a structure in which a first conductive layer and a second conductive layer are sequentially deposited and an HSG is selectively formed on the surface thereof. The first conductive layer is composed of an amorphous or a polycrystalline silicon film having a low concentration of impurities. The second conductive layer is composed of an amorphous silicon film having a high concentration of impurities. According to the present invention, it is possible to obtain a desirable Cmin/Cmax ratio in the lower electrode of the capacitor having an HSG silicon layer and to prevent diffusion of impurities from the lower electrode of the capacitor.

摘要翻译： 提供了一种用于半导体存储器件的电容器及其制造方法。 根据本发明的电容器的下电极具有顺序地沉积第一导电层和第二导电层并且在其表面上选择性地形成HSG的结构。 第一导电层由具有低浓度杂质的无定形或多晶硅膜构成。 第二导电层由具有高浓度杂质的非晶硅膜构成。 根据本发明，可以在具有HSG硅层的电容器的下电极中获得所需的Cmin / Cmax比，并且防止杂质从电容器的下电极扩散。

公开(公告)号：US5622889A

公开(公告)日：1997-04-22

申请号：US591391

申请日：1996-01-25

申请人： Cha-young Yoo ,  Young-sun Kim ,  Young-wook Park ,  Se-jin Shim

发明人： Cha-young Yoo ,  Young-sun Kim ,  Young-wook Park ,  Se-jin Shim

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/70

CPC分类号： H01L27/10852 ,  H01L28/84

摘要： A method for manufacturing a high capacitance capacitor having an HSG film formed on a stack-structured lower storage node, includes the step of forming insulating films for protecting the HSG film. In the present invention the lower storage node and the HSG film formed thereon are not damaged during an etch-back process. The HSG film formed on the lower storage node is protected by means of the insulating films, thereby preventing a decrease in capacitor capacitance.

摘要翻译： 一种制造具有形成在叠层结构的下存储节点上的HSG膜的高电容电容器的方法包括形成用于保护HSG膜的绝缘膜的步骤。 在本发明中，形成在其上的下存储节点和HSG膜在回蚀处理期间不被损坏。 形成在下部存储节点上的HSG膜通过绝缘膜保护，从而防止电容器电容的降低。

公开(公告)号：US5591671A

公开(公告)日：1997-01-07

申请号：US374412

申请日：1995-01-18

申请人： Young-sun Kim ,  Young-wook Park

发明人： Young-sun Kim ,  Young-wook Park

IPC分类号： H01L21/285 ,  H01L21/768 ,  H01L21/283

CPC分类号： H01L21/76838 ,  H01L21/28512

摘要： A method for interconnecting layers in a semiconductor device, which can form a low resistance contact, is provided. An insulating layer is formed on a semiconductor substrate and an opening is formed in the insulating layer. The opening is a contact hole for exposing an impurity diffusion region formed on the semiconductor substrate, or a via hole for exposing a lower conductive layer formed on the semiconductor substrate. Subsequently, a titanium ohmic contacting layer and a titanium nitride barrier layer are formed in the interior of the opening hole and on the insulating layer in sequence. Thereafter, a refractory metal layer which completely fills the remainder of the opening hole by depositing the refractory metal on the barrier layer is formed. To improve a contacting property, the resultant is heat-treated at a temperature above 450.degree. C. As a result, oxidation of the ohmic contacting layer and the barrier layer is prevented, and silicide is actively formed on the interface between the ohmic contacting layer and the silicon substrate, whereby the contacting resistance can be improved. The effect is enhanced for contact holes having a high aspect ratio and a small diameter.

摘要翻译： 提供了一种用于互连半导体器件中可以形成低电阻触点的层的方法。 绝缘层形成在半导体衬底上，并且在绝缘层中形成开口。 开口是用于暴露形成在半导体衬底上的杂质扩散区域的接触孔或用于暴露形成在半导体衬底上的下导电层的通孔。 随后，在开孔内部和绝缘层上依次形成钛欧姆接触层和氮化钛阻挡层。 此后，形成通过在阻挡层上沉积难熔金属而完全填充开口孔的其余部分的难熔金属层。 为了提高接触性能，在450℃以上的温度下进行热处理。结果，可以防止欧姆接触层和阻挡层的氧化，并且在欧姆接触层 和硅基板，从而可以提高接触电阻。 对于高纵横比和小直径的接触孔，效果得到提高。