摘要:
An exemplary display device includes multiple pixels, first through third gate lines and a data line. The pixels include first through third pixels. The first through third gate lines respectively are electrically coupled with the first through third pixels and for deciding whether to enable the first through third pixels. The first pixel is electrically coupled to the data line to receive a display data provided by the data line. The second pixel is electrically coupled to the first pixel to receive a display data provided by the data line through the first pixel. The third pixel is electrically coupled to the second pixel to receive a display data provided by the data line through both the first pixel and the second pixel. A display driving method adapted to be implemented in the display device also is provided.
摘要:
An electrophoretic display and a driving method thereof are provided. The electrophoretic display includes a display panel, a storage unit, a timing controller (TCON). The display panel has a plurality of sub-pixels. The storage unit stores a plurality sets of driving waveforms, wherein the lengths of driving waveforms in the sets of driving waveforms are different from each other. The TCON has an analysis module, couples to the display panel and the storage unit, and receives an image signal having a plurality of display data. The analysis module analyzes the display data to obtain a analysis result. The TCON selects one of the sets of driving waveforms according to the analysis result, and drives the sub-pixels according to the selected set of driving waveforms.
摘要:
A liquid crystal display includes a plurality of light sources of different colors and a control device. The control device is used to control the light sources to emit light with different duty cycles. Through persistence of vision, light generated by the light sources will form an image of desired colors. White balance can be achieved by controlling the duty cycles.
摘要:
The invention is directed to a process for forming p+ and n+ gates on a single substrate. A polycrystalline silicon or amorphous silicon layer is formed on a substrate with n-type and p-type regions formed therein and with a layer of silicon dioxide formed thereover and the structure is subjected hobo a low temperature anneal. A layer of metal silicide is then formed over the structure and n-type and p-type dopants are implanted into the resulting structure. A nitrogen implant is selectively performed in the portion of the metal silicide layer overlying a field oxide region that separates the n-type region from the p-type region in the substrate surface. The nitrogen implant reduces the amount to which the p-type dopant diffuses through the silicide layer and into the n+ gates. A dielectric material is then formed over the structure and patterned, after which the structure is subjected to additional processing steps to form gate stacks over the n-regions and the p-regions of the substrate.
摘要:
A method of integrated circuit fabrication is disclosed. Layers of silicon nitride and silicide dioxide are formed upon a silicon substrate. These layers are etched to create a channel having the width of the intended gate. The silicon dioxide is then wet etched. Next, polysilicon is deposited within the channel. The silicon dioxide and the silicon nitride layers are then removed. A T-shaped polysilicon gate facilitates the formation of rectangular-shaped silicon nitride spacers. Subsequent salicidation is performed.
摘要:
A field effect transistor is fabricated with a window pad layer that is patterned using a patterned dielectric with sublithographic spacing as an etch mask. Desirable attributes of the transistor include small junction capacitance.